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1.
公开(公告)号:US20240234262A9
公开(公告)日:2024-07-11
申请号:US18452845
申请日:2023-08-21
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Junichi NITA , Seiji HIRABAYASHI
IPC: H01L23/495 , H01L21/48
CPC classification number: H01L23/49548 , H01L21/4828 , H01L21/4842
Abstract: A common lead frame can be used for both a first package and a second package and has a planar shape according to specifications of each of a first chip used in the first package and a second chip used in the second package, and a thickness of at least a part of a lead portion through which any one of a first cutting line corresponding to an outer peripheral side of the first package and a second cutting line corresponding to an outer peripheral side of the second package passes is smaller than a thickness of a lead portion through which the first cutting line and the second cutting line do not pass.
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2.
公开(公告)号:US20240136258A1
公开(公告)日:2024-04-25
申请号:US18452845
申请日:2023-08-20
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Junichi NITA , Seiji HIRABAYASHI
IPC: H01L23/495 , H01L21/48
CPC classification number: H01L23/49548 , H01L21/4828 , H01L21/4842
Abstract: A common lead frame can be used for both a first package and a second package and has a planar shape according to specifications of each of a first chip used in the first package and a second chip used in the second package, and a thickness of at least a part of a lead portion through which any one of a first cutting line corresponding to an outer peripheral side of the first package and a second cutting line corresponding to an outer peripheral side of the second package passes is smaller than a thickness of a lead portion through which the first cutting line and the second cutting line do not pass.
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公开(公告)号:US20230290879A1
公开(公告)日:2023-09-14
申请号:US18065091
申请日:2022-12-13
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Seiji HIRABAYASHI , Yusuke OJIMA
CPC classification number: H01L29/7815 , H01L25/074 , H01L29/407 , H01L29/7813
Abstract: A performance of a semiconductor device including a main MOSFET and a sensing MOSFET having a double-gate structure including a gate electrode and a field plate electrode inside a trench is improved. A main MOSFET including a gate electrode and a field plate electrode inside a second trench and a sensing MOSFET for electric-current detection including a gate electrode and a field plate electrode inside a fourth trench are surrounded by different termination rings, respectively.
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