公开(公告)号：US20180351475A1

公开(公告)日：2018-12-06

申请号：US16039751

申请日：2018-07-19

Applicant: Renesas Electronics Corporation

Inventor： Yoshihiko YOKOI ,  Yusuke OJIMA ,  Koichi YAMAZAKI

IPC: H02M7/5387 ,  H02M7/53 ,  H02M7/538 ,  H03K17/082 ,  H02M7/00

CPC classification number: H02M7/5387 ,  H01L2224/48137 ,  H01L2224/48247 ,  H02M7/003 ,  H02M7/53 ,  H02M7/538 ,  H03K17/0828

Abstract: A power conversion system includes a high-side circuit and a low-side circuit, a controller communicating with the high-side circuit and the low-side circuit; a first coupling circuit including a wire between the controller and the high-side circuit; and a second coupling circuit including a wire between the controller and the low-side circuit.

公开(公告)号：US20170288597A1

公开(公告)日：2017-10-05

申请号：US15431808

申请日：2017-02-14

Applicant: Renesas Electronics Corporation

Inventor： Yusuke OJIMA ,  Yoshihiko YOKOI

IPC: H02P29/028 ,  H02P27/08 ,  H03K17/08 ,  H03K17/04 ,  H03K17/567

CPC classification number: H02P29/028 ,  H02M1/08 ,  H02M2001/0029 ,  H02P27/08 ,  H03K17/0406 ,  H03K17/08 ,  H03K17/0828 ,  H03K17/163 ,  H03K17/567 ,  H03K2217/0027

Abstract: In a semiconductor device in the related art, it has been necessary to match the threshold voltage of a power element with the circuit operation of a gate driver; accordingly, it has been difficult to realize the operation of the gate driver most appropriate for the employed power element. According to one embodiment, when a power element is turned off, the semiconductor device monitors the collector voltage of the power element, and increases the number of NMOS transistors that draw out charges from the gate of the power element in a period until the collector voltage becomes lower than the pre-set determination threshold, rather than in the period after the collector voltage becomes lower than the determination threshold.

公开(公告)号：US20170287802A1

公开(公告)日：2017-10-05

申请号：US15430455

申请日：2017-02-11

Applicant: Renesas Electronics Corporation

Inventor： Hideo NUMABE ,  Koji TATENO ,  Yusuke OJIMA ,  Yoshihiko YOKOI ,  Shinya ISHIDA ,  Hitoshi MATSUURA

IPC: H01L23/34 ,  H01L23/528 ,  H01L29/06 ,  H01L23/522 ,  H01L23/532 ,  H01L21/285 ,  H01L21/311 ,  H01L21/8234 ,  H01L21/306 ,  H01L21/265 ,  H01L21/3205 ,  H03K17/16 ,  H01L49/02

CPC classification number: H01L23/34 ,  H01L21/26513 ,  H01L21/2855 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/32055 ,  H01L21/823412 ,  H01L23/5228 ,  H01L23/5286 ,  H01L23/53271 ,  H01L27/0629 ,  H01L28/20 ,  H01L29/0692 ,  H01L29/7393 ,  H01L29/74 ,  H01L29/78 ,  H01L29/861 ,  H03K17/16 ,  H03K2017/0806 ,  H03K2217/0027 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: A semiconductor device includes a power device and a temperature detection diode. The semiconductor device has a device structure configured to insulate between a power lien of the power device and the temperature detection diode.

公开(公告)号：US20170288653A1

公开(公告)日：2017-10-05

申请号：US15468326

申请日：2017-03-24

Applicant: Renesas Electronics Corporation

Inventor： Yoshihiko YOKOI ,  Yusuke OJIMA

IPC: H03K5/08 ,  H03K17/567 ,  H03K5/24

CPC classification number: H03K5/08 ,  H03K5/24 ,  H03K17/0406 ,  H03K17/08128 ,  H03K17/163 ,  H03K17/168 ,  H03K17/567

Abstract: There is a problem in related-art semiconductor devices that the chip size of a semiconductor device having an active Miller clamp function cannot be reduced. According to one embodiment, a semiconductor device is configured to, when a power device is turned on or off, monitor a gate voltage Vg of the power device, set a predetermined range within a transition range, the transition range being a range within which the gate voltage Vg changes, change, when the gate voltage Vg is within the predetermined range, the gate voltage Vg of the power device by using a predetermined number of constant-current circuits, and change, when the gate voltage Vg is outside the predetermined range, the gate voltage Vg by using a larger number of constant-current circuits than the number of constant-current circuits that are used when the gate voltage Vg is within the predetermined range.

公开(公告)号：US20170179849A1

公开(公告)日：2017-06-22

申请号：US15376374

申请日：2016-12-12

Applicant: Renesas Electronics Corporation

Inventor： Yoshihiko YOKOI ,  Yusuke OJIMA ,  Koichi YAMAZAKI

IPC: H02M7/539 ,  H03K17/082

CPC classification number: H02M7/5387 ,  H01L2224/48137 ,  H01L2224/48247 ,  H02M7/003 ,  H02M7/53 ,  H02M7/538 ,  H03K17/0828

Abstract: A power conversion system has a first coupling circuit including a wire between a controller and a high-side circuit and a second coupling circuit including a wire between the controller and a low-side circuit. The first coupling circuit has a diode having an anode coupled to a wire from the controller and a cathode coupled to a wire from the high-side circuit.

公开(公告)号：US20230290879A1

公开(公告)日：2023-09-14

申请号：US18065091

申请日：2022-12-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Seiji HIRABAYASHI ,  Yusuke OJIMA

IPC: H01L29/78 ,  H01L25/07 ,  H01L29/40

CPC classification number: H01L29/7815 ,  H01L25/074 ,  H01L29/407 ,  H01L29/7813

Abstract: A performance of a semiconductor device including a main MOSFET and a sensing MOSFET having a double-gate structure including a gate electrode and a field plate electrode inside a trench is improved. A main MOSFET including a gate electrode and a field plate electrode inside a second trench and a sensing MOSFET for electric-current detection including a gate electrode and a field plate electrode inside a fourth trench are surrounded by different termination rings, respectively.

公开(公告)号：US20230253398A1

公开(公告)日：2023-08-10

申请号：US17668886

申请日：2022-02-10

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yusuke OJIMA

IPC: H01L27/02

CPC classification number: H01L27/0274 ,  H02J7/0029

Abstract: A semiconductor device includes a first power semiconductor device, a first Nch MOSFET whose drain is coupled to a gate of the first power semiconductor device, a first gate resistor coupled to a source of the first Nch MOSFET and a first diode coupled between the source and drain of the first Nch MOSFET.

公开(公告)号：US20220115306A1

公开(公告)日：2022-04-14

申请号：US17068446

申请日：2020-10-12

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshimasa UCHINUMA ,  Yusuke OJIMA

IPC: H01L23/495 ,  H01L23/31

Abstract: A semiconductor device includes a semiconductor chip, first and second source terminals and a Kelvin terminal, wherein the semiconductor chip includes a first source electrode coupled to the first source terminal through a first connecting portion, a second source electrode coupled to the second source terminal through a second connecting portion, a Kelvin pad coupled to the Kelvin terminal and formed independently of the first source electrode, a power MOSFET that has a source coupled to the first source electrode, a sense MOSFET that has a source coupled to the second source electrode, a source pad formed on a portion of the first source electrode and coupled to the first connecting portion, a plurality of source potential extraction ports formed around a connection point between the first connecting portion and the source pad and a plurality of wires coupled between the source potential extraction ports and the Kelvin pad.

公开(公告)号：US20210141006A1

公开(公告)日：2021-05-13

申请号：US17036952

申请日：2020-09-29

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshihiko YOKOI ,  Yusuke OJIMA

IPC: G01R19/10 ,  H03K17/687

Abstract: A semiconductor device includes m power transistors (m is an integer of 2 or more) coupled in parallel each of which has a sense source terminal, a Kelvin terminal and a source terminal, a first average circuit that connects the first resistor and the second resistor in order between the sense source terminal and the Kelvin terminal and generates first to fourth average voltages and an arithmetic circuit that measures a first current value flowing through the sense source terminal from the first and second average voltages, measures a second current value flowing through the sense source terminal from the third and fourth average voltages and measures a current value flowing through the source terminal from the first to fourth average voltages and the first and second current values.

公开(公告)号：US20180183433A1

公开(公告)日：2018-06-28

申请号：US15814205

申请日：2017-11-15

Applicant: Renesas Electronics Corporation

Inventor： Yusuke OJIMA ,  Yoshihiko YOKOI

IPC: H03K17/16 ,  H02M3/158 ,  H03K17/042 ,  H03K17/0814 ,  H01L29/423 ,  H01L29/739 ,  H01L29/66

CPC classification number: H03K17/168 ,  H01L21/823487 ,  H01L27/0629 ,  H01L27/088 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/4983 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/7813 ,  H02M3/158 ,  H02M7/537 ,  H02M2001/0009 ,  H03K17/04206 ,  H03K17/08148 ,  H03K2217/0081

Abstract: To provide a semiconductor device capable of preventing a surge voltage at the time of turn-off without complicating a gate drive circuit and without increasing switching delay.A semiconductor device has a configuration in which a plurality of transistors are equivalently coupled in parallel by including a plurality of control electrodes for controlling a current flowing between a first main electrode and a second main electrode. A resistance value of a transmission path of a control signal from a common control terminal varies with respect to each of the control electrodes.