公开(公告)号：US20190393169A1

公开(公告)日：2019-12-26

申请号：US16444823

申请日：2019-06-18

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Katsumi EIKYU ,  Fumihito OTA ,  Takashi IPPOSHI

IPC: H01L23/00 ,  H01L23/528 ,  H01L23/522

Abstract: The semiconductor device SD1a includes a first wiring M2 and a second wiring M3. The semiconductor device includes a first conductor pattern DM, a first via V2 in contact with the first wiring M2 and the second wiring M3, and a second via DV1, DV2, DV3, DV4 in contact with the first conductor pattern DM and the second wiring M3. In plan view, the distance between the second via DV1 closest to the corner portion CI of the second wire M3 and the corner portion CI is shorter than the distance between the first via V2 and the corner portion CI, and the distance between the second vias adjacent to each other is shorter than the distance between the second via DV3 closest to the first via V2 and the first via V2.

公开(公告)号：US20200006222A1

公开(公告)日：2020-01-02

申请号：US16446078

申请日：2019-06-19

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshikazu NAGAMURA ,  Takashi IPPOSHI ,  Katsumi EIKYU

IPC: H01L23/522 ,  H01L21/3213 ,  H01L21/768

Abstract: The semiconductor device has a wiring M 2, an interlayer insulating film IL3 formed on the wiring M 2, and two wirings M 3 formed on the interlayer insulating film IL3, and the wiring M 3 is connected to the wiring M 2 by a conductor layer PG2 formed in the interlayer insulating film IL3. A recess CC3 is formed on the upper surface IL3a of the interlayer insulating film IL3, and the recess CC3 is defined by a side surface S 31 connected to the upper surface IL3a and a side surface S 32 connected to the side surface S 31, and the side surface S 32 is inclined so that the width WC3 of the recess CC3 decreases in the direction from the upper surface IL3a of the interlayer insulating film IL3 toward the upper surface IL2a of the interlayer insulating film IL2.