公开(公告)号：US20200006222A1

公开(公告)日：2020-01-02

申请号：US16446078

申请日：2019-06-19

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshikazu NAGAMURA ,  Takashi IPPOSHI ,  Katsumi EIKYU

IPC: H01L23/522 ,  H01L21/3213 ,  H01L21/768

Abstract: The semiconductor device has a wiring M 2, an interlayer insulating film IL3 formed on the wiring M 2, and two wirings M 3 formed on the interlayer insulating film IL3, and the wiring M 3 is connected to the wiring M 2 by a conductor layer PG2 formed in the interlayer insulating film IL3. A recess CC3 is formed on the upper surface IL3a of the interlayer insulating film IL3, and the recess CC3 is defined by a side surface S 31 connected to the upper surface IL3a and a side surface S 32 connected to the side surface S 31, and the side surface S 32 is inclined so that the width WC3 of the recess CC3 decreases in the direction from the upper surface IL3a of the interlayer insulating film IL3 toward the upper surface IL2a of the interlayer insulating film IL2.