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公开(公告)号:US20200168540A1
公开(公告)日:2020-05-28
申请号:US16653098
申请日:2019-10-15
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Yoshitaka OKAYASU , Shuuichi KARIYAZAKI
IPC: H01L23/498 , H01L23/00 , H01L25/16
Abstract: The lower surface of the wiring substrate includes a first region overlapping with the semiconductor chip mounted on the upper surface, and a second region surrounding the first region and not overlapping with the semiconductor chip. The first region includes a third region in which the plurality of external terminals is not arranged, and a fourth region surrounding the third region in which the plurality of external terminals is arranged. The plurality of external terminals includes a plurality of terminals arranged in the fourth region of the first region and a plurality of terminals arranged in the second region. The plurality of terminals includes a plurality of power supply terminals for supplying a power supply potential to the core circuit of the semiconductor chip, and a plurality of reference terminals for supplying a reference potential to the core circuit of the semiconductor chip.
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公开(公告)号:US20190115295A1
公开(公告)日:2019-04-18
申请号:US16057724
申请日:2018-08-07
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Shuuichi KARIYAZAKI , Keita TSUCHIYA , Yoshitaka OKAYASU , Wataru SHIROI
IPC: H01L23/498 , H01L23/00
Abstract: A semiconductor device has a wiring substrate on which a semiconductor chip is mounted. A wiring layer of the wiring substrate has a wiring. This wiring has a main wiring unit extending in a direction “X” and a plurality of sub-wiring units extending in a direction “Y”, in a cross sectional view, and is supplied with a power source potential. The wiring layer has a wiring. This wiring has a main wiring unit extending in the direction “X” and a plurality of sub-wiring units extending in the direction “Y”, in a cross sectional view, and is supplied with a reference potential. The sub-wiring units and the sub-wiring units have end units and end units on a side opposed to the end units, and are alternately arranged along the direction “X” between the main wiring units. To the end units, via wirings are coupled.
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