公开(公告)号：US20240220742A1

公开(公告)日：2024-07-04

申请号：US18148266

申请日：2022-12-29

Applicant: ROBERT BOSCH GMBH

Inventor： Kenneth Edward WOJCIECHOWSKI ,  Sangwoo LEE

IPC: G06J1/00 ,  H03M1/46

CPC classification number: G06J1/00 ,  H03M1/462 ,  H03M1/466 ,  G11C11/413

Abstract: A multiply-accumulate successive approximation (MASAR) column is provided. The MASAR column includes a plurality of MASAR cells, each including a multiplier configured to perform digital multiplication between an input activation received to an input and an operand to compute a result, and a unit capacitor configured to store the result as analog charge. The MASAR column further includes digital logic configured to perform analog summation of the analog charge of the unit capacitors of the plurality of MASAR cells to determine a digital output of the multiplication.

公开(公告)号：US20240223207A1

公开(公告)日：2024-07-04

申请号：US18148259

申请日：2022-12-29

Applicant: ROBERT BOSCH GMBH

Inventor： Kenneth Edward WOJCIECHOWSKI ,  Sangwoo LEE

IPC: H03M1/46 ,  G06F7/544 ,  G06F9/30 ,  G11C11/413 ,  H03M1/80

CPC classification number: H03M1/462 ,  G06F7/5443 ,  G06F9/3001 ,  G11C11/413 ,  H03M1/804 ,  G06F2207/4812 ,  G06F2207/4824

Abstract: A multiply-accumulate successive approximation (MASAR) column is provided. The MASAR column includes a plurality of MASAR cells, each including a multiplier configured to perform digital multiplication between an input activation received to an input and an operand to compute a result, and a unit capacitor configured to store the result as analog charge. The MASAR column further includes digital logic configured to perform analog summation of the analog charge of the unit capacitors of the plurality of MASAR cells to determine a digital output of the multiplication.