Ceramide-analogous metabolites
    5.
    发明授权
    Ceramide-analogous metabolites 失效
    神经酰胺类似的代谢物

    公开(公告)号:US08673982B2

    公开(公告)日:2014-03-18

    申请号:US13202939

    申请日:2010-02-23

    CPC分类号: A61K31/165 C07C233/18

    摘要: This invention relates to certain ceramide-analogues of FTY720 (2-amino-2-[2-(4-octylphenyl)ethyl]propane-1,3-diol; fingolimod). In particular, the present invention relates to pharmaceutical compositions comprising these compounds, as well as processes for their preparation and their use in the treatment of autoimmune conditions, such as multiple sclerosis.

    摘要翻译: 本发明涉及FTY720(2-氨基-2- [2-(4-辛基苯基)乙基]丙烷-1,3-二醇,芬戈莫德)的某些神经酰胺类似物。 特别地,本发明涉及包含这些化合物的药物组合物,以及其制备方法及其在治疗自身免疫病症如多发性硬化中的应用。

    Logic unit operable under the byzantine algorithm, computer unit having such logic unit, composite assembly comprised of logic units or computer units, and method of operating such an assembly
    7.
    发明授权
    Logic unit operable under the byzantine algorithm, computer unit having such logic unit, composite assembly comprised of logic units or computer units, and method of operating such an assembly 有权
    在拜占庭算法下运行的逻辑单元,具有这种逻辑单元的计算机单元,由逻辑单元或计算机单元组成的复合组件,以及操作这种组件的方法

    公开(公告)号:US06567927B1

    公开(公告)日:2003-05-20

    申请号:US09565139

    申请日:2000-05-05

    申请人: Volker Brinkmann

    发明人: Volker Brinkmann

    IPC分类号: G06F1100

    摘要: A logic unit operable under the Byzantine algorithm for the architectural configuration of a composite assembly which tolerates an amount of F errors in simultaneous manner as to time and a plurality of inputs for in-reading of data into registers of a set of registers, and a plurality of outputs for out-reading of data from the registers, whereby each output is connectable with an input of a further logic unit, whereby the registers are coupled with the inputs and outputs in such a manner that each register is capable of being read-in and being capable of being read-out independently of the position of the logic unit within the assembly, by means of a position invariant, relative identification, as well as a computer unit with such a logic unit, as well as the fault-tolerant assembly of such logic/computer units, and a method of operating a fault tolerant assembly.

    摘要翻译: 一种逻辑单元,可在拜占庭算法下运行,用于复合组件的体系结构配置,该组合组件允许同时以时间为单位的F错误量,以及用于将数据读入一组寄存器的寄存器的多个输入,以及 多个输出用于从寄存器中读出数据,由此每个输出可与另一个逻辑单元的输入端连接,由此寄存器与输入和输出耦合,使得每个寄存器能够被读取, 并且能够通过位置不变,相对标识以及具有这种逻辑单元的计算机单元独立于组件内的逻辑单元的位置被读出,以及容错 这种逻辑/计算机单元的组装以及操作容错组件的方法。