公开(公告)号：US20240394195A1

公开(公告)日：2024-11-28

申请号：US18665319

申请日：2024-05-15

Applicant: Rambus Inc.

Inventor： Steven C. WOO ,  Michael Raymond MILLER ,  Taeksang SONG ,  Wendy ELSASSER ,  Maryam BABAIE

IPC: G06F12/0895 ,  G06F12/084 ,  G06F13/16

Abstract: A dynamic random access memory (DRAM) device includes functions configured to aid with operating the DRAM device as part of data caching functions. The DRAM is configured to respond to at least two types of commands. A first type of command (cache data access command) seeks to access a cache line of data, if present in the DRAM cache. A second type of command (cache probe command) seeks to determine whether a cache line of data is present, but is not requesting the data be returned in response. In response to these types of access commands, the DRAM device is configured to receive cache tag query values and to compare stored cache tag values with the cache tag query values. A hit/miss (HM) interface/bus may indicate the result of the cache tag compare and stored cache line status bits to a controller.