Multistage voltage regulator circuit
    3.
    发明授权
    Multistage voltage regulator circuit 有权
    多级稳压电路

    公开(公告)号:US09117507B2

    公开(公告)日:2015-08-25

    申请号:US12853106

    申请日:2010-08-09

    CPC分类号: G11C5/147 G05F1/00 G05F1/577

    摘要: Circuit embodiments of a multistage voltage regulator circuit are presented, where a circuit includes a first stage that includes a first bias transistor having a current terminal coupled to a first regulated node. The circuit also includes a second stage that includes a second bias transistor having a current terminal coupled to a second regulated node. The circuit also includes a third stage including a third bias transistor having a current terminal coupled to a third node. The circuit also includes a control loop for regulating voltages at the first and second regulated nodes, where the second regulated node is connected to a control terminal of the first bias transistor; and where the first regulated node is connected to a control terminal of the third bias transistor.

    摘要翻译: 呈现多级电压调节器电路的电路实施例,其中电路包括第一级,其包括具有耦合到第一调节节点的电流端的第一偏置晶体管。 电路还包括第二级,其包括具有耦合到第二调节节点的电流端子的第二偏置晶体管。 电路还包括第三级,包括具有耦合到第三节点的电流端子的第三偏置晶体管。 电路还包括用于调节第一和第二调节节点处的电压的控制回路,其中第二调节节点连接到第一偏置晶体管的控制端子; 并且其中第一调节节点连接到第三偏置晶体管的控制端子。

    Integrated circuit having low power mode voltage regulator
    4.
    发明授权
    Integrated circuit having low power mode voltage regulator 有权
    集成电路具有低功耗模式电压调节器

    公开(公告)号:US08319548B2

    公开(公告)日:2012-11-27

    申请号:US12622277

    申请日:2009-11-19

    IPC分类号: G05F1/10

    CPC分类号: G05F1/56 G11C5/147

    摘要: A voltage regulator regulates voltage at a node and has circuitry coupled to the node for providing a current to the node. A regulating transistor coupled between the node and a first power supply voltage terminal has a disabling transistor coupled in parallel and is selectively disabled by directly connecting the first power supply voltage terminal to the node. An inverting stage has an output connected to the regulating transistor. A load transistor has a first current electrode coupled to a second power supply voltage terminal, and a control electrode and second current electrode connected together and coupled to an input of the inverting stage. A sensing transistor has a first current electrode coupled to the second current electrode of the load transistor, a control electrode connected directly to the node and a second current electrode coupled to the first power supply voltage terminal.

    摘要翻译: 电压调节器调节节点处的电压,并且具有耦合到节点的电路以向节点提供电流。 耦合在节点和第一电源电压端子之间的调节晶体管具有并联耦合的禁用晶体管,并且通过将第一电源电压端子直接连接到节点来选择性地禁止。 反相级具有连接到调节晶体管的输出端。 负载晶体管具有耦合到第二电源电压端子的第一电流电极和连接在一起并耦合到反相级的输入端的控制电极和第二电流电极。 感测晶体管具有耦合到负载晶体管的第二电流电极的第一电流电极,直接连接到节点的控制电极和耦合到第一电源电压端子的第二电流电极。

    MULTISTAGE VOLTAGE REGULATOR CIRCUIT
    5.
    发明申请
    MULTISTAGE VOLTAGE REGULATOR CIRCUIT 有权
    多电平电压调节器电路

    公开(公告)号:US20120032655A1

    公开(公告)日:2012-02-09

    申请号:US12853106

    申请日:2010-08-09

    IPC分类号: G05F1/10

    CPC分类号: G11C5/147 G05F1/00 G05F1/577

    摘要: A circuit including a multistage voltage regulator having a plurality of stages each including a regulated node and a bias transistor. The bias transistors and regulated nodes are configured to control the voltage of the regulated nodes. For at least some of the stages, the regulated nodes are coupled to voltage supply terminals of circuit modules of the stages.

    摘要翻译: 一种电路,包括具有多个级的多级稳压器,每个级包括调节节点和偏置晶体管。 偏置晶体管和调节节点配置为控制受调节节点的电压。 对于至少一些级,调节节点耦合到级的电路模块的电压端。

    CIRCUIT FOR A LOW POWER MODE
    6.
    发明申请
    CIRCUIT FOR A LOW POWER MODE 有权
    低功耗模式电路

    公开(公告)号:US20100207687A1

    公开(公告)日:2010-08-19

    申请号:US12372997

    申请日:2009-02-18

    IPC分类号: G05F1/10

    CPC分类号: G05F1/56 G11C5/147

    摘要: A circuit has a first transistor having a first current electrode coupled to a first supply voltage terminal and a second current electrode coupled to a virtual supply voltage node. A second transistor has a first current electrode coupled to the first supply voltage terminal and a control electrode coupled to the virtual supply voltage node. A first load has an input and has an output coupled to a second current electrode of the second transistor. A third transistor has a control electrode coupled to the output of the first load. A second load has an input coupled to the first supply voltage terminal, and has an output that is coupled to both a control electrode of the first transistor and a first current electrode of the third transistor. The virtual supply voltage node provides an operating voltage to a circuit module that alternates between normal and drowsy operating modes.

    摘要翻译: 电路具有第一晶体管,其具有耦合到第一电源电压端子的第一电流电极和耦合到虚拟电源电压节点的第二电流电极。 第二晶体管具有耦合到第一电源电压端子的第一电流电极和耦合到虚拟电源电压节点的控制电极。 第一负载具有输入并且具有耦合到第二晶体管的第二电流电极的输出。 第三晶体管具有耦合到第一负载的输出的控制电极。 第二负载具有耦合到第一电源电压端子的输入,并且具有耦合到第一晶体管的控制电极和第三晶体管的第一电流电极两者的输出。 虚拟电源电压节点向在正常和困倦的操作模式之间交替的电路模块提供工作电压。

    Circuit for a low power mode
    7.
    发明授权
    Circuit for a low power mode 有权
    低功耗模式电路

    公开(公告)号:US07825720B2

    公开(公告)日:2010-11-02

    申请号:US12372997

    申请日:2009-02-18

    IPC分类号: G05F1/10

    CPC分类号: G05F1/56 G11C5/147

    摘要: A circuit has a first transistor having a first current electrode coupled to a first supply voltage terminal and a second current electrode coupled to a virtual supply voltage node. A second transistor has a first current electrode coupled to the first supply voltage terminal and a control electrode coupled to the virtual supply voltage node. A first load has an input and has an output coupled to a second current electrode of the second transistor. A third transistor has a control electrode coupled to the output of the first load. A second load has an input coupled to the first supply voltage terminal, and has an output that is coupled to both a control electrode of the first transistor and a first current electrode of the third transistor. The virtual supply voltage node provides an operating voltage to a circuit module that alternates between normal and drowsy operating modes.

    摘要翻译: 电路具有第一晶体管,其具有耦合到第一电源电压端子的第一电流电极和耦合到虚拟电源电压节点的第二电流电极。 第二晶体管具有耦合到第一电源电压端子的第一电流电极和耦合到虚拟电源电压节点的控制电极。 第一负载具有输入并且具有耦合到第二晶体管的第二电流电极的输出。 第三晶体管具有耦合到第一负载的输出的控制电极。 第二负载具有耦合到第一电源电压端子的输入,并且具有耦合到第一晶体管的控制电极和第三晶体管的第一电流电极两者的输出。 虚拟电源电压节点向在正常和困倦的操作模式之间交替的电路模块提供工作电压。

    ELECTRONIC CIRCUIT HAVING SHARED LEAKAGE CURRENT REDUCTION CIRCUITS
    8.
    发明申请
    ELECTRONIC CIRCUIT HAVING SHARED LEAKAGE CURRENT REDUCTION CIRCUITS 有权
    具有共享漏电流减少电路的电子电路

    公开(公告)号:US20120200336A1

    公开(公告)日:2012-08-09

    申请号:US13020565

    申请日:2011-02-03

    IPC分类号: H03K3/011 G05F1/10

    CPC分类号: H03K19/0008 H03K19/0016

    摘要: An electronic circuit includes a plurality of circuit blocks, a plurality of bias circuits, a switching circuit, and plurality of transistors. The plurality of circuit blocks each includes a high power terminal and a low power terminal. The switching circuit includes a plurality of switches for selectively coupling a bias circuit of the plurality of bias circuits to the low power terminal of a circuit block of the plurality of circuit blocks. Each bias circuit of the plurality of bias circuits is selectively couplable to the low power terminal of each of the plurality of circuit blocks. Each transistor of the plurality of transistors has a first current terminal coupled to a circuit ground terminal, and each transistor of the plurality of transistors has a control terminal for controlling the conductivity of the plurality of the transistors by a bias circuit of the plurality of bias circuits.

    摘要翻译: 电子电路包括多个电路块,多个偏置电路,开关电路和多个晶体管。 多个电路块各自包括高功率端子和低功率端子。 开关电路包括多个开关,用于将多个偏置电路的偏置电路选择性地耦合到多个电路块的电路块的低功率端子。 多个偏置电路的每个偏置电路可以选择性地耦合到多个电路块中的每一个的低功率端子。 多个晶体管的每个晶体管具有耦合到电路接地端子的第一电流端子,并且多个晶体管中的每个晶体管具有控制端子,用于通过多个偏置的偏置电路来控制多个晶体管的导电性 电路。

    Data processing having multiple low power modes and method therefor
    9.
    发明授权
    Data processing having multiple low power modes and method therefor 有权
    具有多种低功率模式的数据处理及其方法

    公开(公告)号:US08566620B2

    公开(公告)日:2013-10-22

    申请号:US12846042

    申请日:2010-07-29

    IPC分类号: G06F1/00

    摘要: A method is provided for operating a data processing system having a memory. The memory is coupled between a first power supply voltage terminal for receiving a first variable potential and a second power supply voltage terminal for receiving a second variable potential. An initial difference between the first variable potential and the second variable potential is not less than a first voltage. The method comprises: receiving a command to transition the data processing system from a first power supply voltage to a second power supply voltage; changing the second variable potential so that a difference between the second variable potential and the first variable potential is greater than the first voltage; and after changing the second variable potential, changing the first variable potential, wherein a difference between the first variable potential and the second variable potential is not less than the first voltage.

    摘要翻译: 提供了一种用于操作具有存储器的数据处理系统的方法。 存储器耦合在用于接收第一可变电位的第一电源电压端子和用于接收第二可变电位的第二电源电压端子之间。 第一可变电位和第二可变电位之间的初始差不小于第一电压。 该方法包括:接收将数据处理系统从第一电源电压转换到第二电源电压的命令; 改变第二可变电位,使得第二可变电位和第一可变电位之间的差大于第一电压; 并且在改变第二可变电位之后,改变第一可变电位,其中第一可变电位和第二可变电位之间的差不小于第一电压。

    Electronic circuit having shared leakage current reduction circuits
    10.
    发明授权
    Electronic circuit having shared leakage current reduction circuits 有权
    具有共享泄漏电流降低电路的电子电路

    公开(公告)号:US08710916B2

    公开(公告)日:2014-04-29

    申请号:US13020565

    申请日:2011-02-03

    IPC分类号: G05F1/10 G05F3/02

    CPC分类号: H03K19/0008 H03K19/0016

    摘要: An electronic circuit includes a plurality of circuit blocks, a plurality of bias circuits, a switching circuit, and plurality of transistors. The plurality of circuit blocks each includes a high power terminal and a low power terminal. The switching circuit includes a plurality of switches for selectively coupling a bias circuit of the plurality of bias circuits to the low power terminal of a circuit block of the plurality of circuit blocks. Each bias circuit of the plurality of bias circuits is selectively couplable to the low power terminal of each of the plurality of circuit blocks. Each transistor of the plurality of transistors has a first current terminal coupled to a circuit ground terminal, and each transistor of the plurality of transistors has a control terminal for controlling the conductivity of the plurality of the transistors by a bias circuit of the plurality of bias circuits.

    摘要翻译: 电子电路包括多个电路块,多个偏置电路,开关电路和多个晶体管。 多个电路块各自包括高功率端子和低功率端子。 开关电路包括多个开关,用于将多个偏置电路的偏置电路选择性地耦合到多个电路块的电路块的低功率端子。 多个偏置电路的每个偏置电路可以选择性地耦合到多个电路块中的每一个的低功率端子。 多个晶体管的每个晶体管具有耦合到电路接地端子的第一电流端子,并且多个晶体管中的每个晶体管具有控制端子,用于通过多个偏置的偏置电路来控制多个晶体管的导电性 电路。