公开(公告)号：US3962699A

公开(公告)日：1976-06-08

申请号：US488282

申请日：1974-07-15

Applicant: Raymond D. Brunson

Inventor： Raymond D. Brunson

IPC: A63D5/04

CPC classification number: A63D5/04

Abstract: A command signal circuit accepting switch input information from a plurality of mechanical switches introducing undesired contact bounce, and providing a single clean output command signal. The circuit accomodates the plurality of input switches with circuit sections in parallel and "OR"ing to the output resolving all switch commands to one signal. Filtering is applied at a logic receiving end of lead lines to take out noise ripple induced with long leads, and the filter output is applied to both a one-shot multivibrator and a delay circuit having outputs "OR"ed together with the one-shot taking out the contact bounce on the leading edge with switch closure and the delay circuit taking care of contact bounce on the trailing portion of the switching action with switch opening.

Abstract translation: 接收来自多个机械开关的开关输入信息的指令信号电路引入不需要的触点反弹，并且提供单个清洁输出命令信号。 该电路并联多个具有电路部分的输入开关，并将“OR”分配给输出，将所有开关命令解析为一个信号。 在引线的逻辑接收端施加滤波以消除由长引线引起的噪声纹波，并且滤波器输出被应用于单稳态多谐振荡器和具有输出“OR”的延迟电路与一次触发 在开关闭合的情况下取出前端的触点反弹，延迟电路在切换开关的开关动作的尾部保留触点反弹。

公开(公告)号：US3974483A

公开(公告)日：1976-08-10

申请号：US517864

申请日：1974-10-25

Applicant: Raymond D. Brunson

Inventor： Raymond D. Brunson

IPC: A63D5/04 ,  G06F19/00 ,  G06F15/44

CPC classification number: A63D5/04

Abstract: An automatic scoring system for the game of bowling utilizing 30 scratch memories arranged in 10 successive groups of three, corresponding to the three possible score additions in each of ten successive bowling frames. Input information in the form of successive ball pin scores is sequenced on a common input line to each of the scratch memories. Thirty logic gating circuits, associated with respective individual scratch memories, and operating in time synchronism with the sequenced input information, determine, from the number of ball scores presented and the values of sequential scores, into which one or ones of the scratch memories successive ball scores are entered as a score addition in that place at that time. The system collates consecutive ball scores into the scratch memories such that summation of entries into from one to three of the three scratch memories for a logically determined complete frame represents the score in that frame.

Abstract translation: 一种用于保龄球游戏的自动评分系统，其利用30个连续的三组中的30个临时存储器，对应于在十个连续的保龄球架中的每一个中的三个可能的得分添加。 在连续球针分数形式的输入信息在每个划痕存储器的公共输入线上排序。 与相应的各个划痕存储器相关联的三十个逻辑门控电路以及与排序的输入信息的时间同步操作，根据所呈现的球分数和连续分数的值确定连续球中的一个或多个 当时在该地方的成绩加成分。 系统将连续的球分数整理到暂存存储器中，使得对于逻辑确定的完整帧，三个暂存存储器中的一个到三个条目的总和表示该帧中的得分。

公开(公告)号：US3987417A

公开(公告)日：1976-10-19

申请号：US512682

申请日：1974-10-07

Applicant: Raymond D. Brunson

Inventor： Raymond D. Brunson

IPC: G06F12/02 ,  G06F19/00 ,  G11C9/00

CPC classification number: G06F12/02

Abstract: A binary address memory unit which generates, in response to successive command inputs, successive binary output address words which progress directly according to binary count. Each command input provides for generation of time sequenced clock pulses which, in conjunction with an adder circuit, causes a next successive higher output to be generated from an output register and causes binary one to be added to that output as a stored address to be read out upon the time occurrence of a next successive input command.

Abstract translation: 二进制地址存储单元，其响应于连续的命令输入，根据二进制计数直接进行二进制输出地址字。 每个命令输入提供产生时间排序的时钟脉冲，其与加法器电路一起使得从输出寄存器产生下一个连续的较高输出，并且将二进制输入添加到该输出作为要读取的存储地址 在下一个连续输入命令的发生时出来。

公开(公告)号：US4188571A

公开(公告)日：1980-02-12

申请号：US721800

申请日：1976-09-08

Applicant: Raymond D. Brunson

Inventor： Raymond D. Brunson

IPC: H01J45/00 ,  H02N3/00 ,  H02N7/00

CPC classification number: H02N3/00 ,  H01J45/00

Abstract: A radiant energy to electrical power thermionic conversion system using a transducer structure with very closely spaced cathode and anode elements in a vacuum to minimize space charge buildup and to optimize cross transfer of electrons from cathode to anode. The materials chosen are for a high work function high melt temperature cathode, tungsten for example with a work function of 4.52 volts, and an anode with a relatively low work function, typically a silver-oxide substrate with a coating of cesium as an anode face deposited on a copper heat sink conductor yielding, with the anode face, a work function approximating 0.75 volts.

Abstract translation: 使用在真空中具有非常接近间隔的阴极和阳极元件的换能器结构的电力热离子转换系统的辐射能，以最小化空间电荷积聚并优化电子从阴极到阳极的交叉传递。 所选择的材料是用于高功函数高熔体温度阴极，例如功函数为4.52伏特的钨，以及具有较低功函数的阳极，通常为具有铯作为阳极面的涂层的氧化银衬底 沉积在铜散热器导体上，阳极表面的功函数接近0.75伏。

公开(公告)号：US3962689A

公开(公告)日：1976-06-08

申请号：US525917

申请日：1974-11-21

Applicant: Raymond D. Brunson

Inventor： Raymond D. Brunson

IPC: A63D5/04 ,  G06F5/10 ,  G11C8/04 ,  G11C13/00

CPC classification number: G06F5/10 ,  G11C8/04 ,  A63D5/04

Abstract: A control circuit for reading from, and writing into, a random access memory into which successive data entries are stored at addresses in sequential binary order. A scan generator provides a repeated sequence of all sequential binary order addresses to the memory, and the write-enable input of the memory is controlled in synchronism with the memory addressing by continuously comparing the desired addresses of next-date entries with the scan generator addressing output, and enabling the write function of the memory when these addressing signals are the same.

Abstract translation: 一种用于从随机存取存储器读取和写入随机存取存储器的控制电路，其中连续数据条目以顺序的二进制顺序存储在地址处。 扫描发生器向存储器提供所有顺序的二进制地址的重复序列，并且通过连续地将下一日期条目的期望地址与扫描发生器寻址相对应地与存储器寻址同步地控制存储器的写使能输入 输出，并且当这些寻址信号相同时启用存储器的写入功能。