公开(公告)号：US11127596B2

公开(公告)日：2021-09-21

申请号：US16322731

申请日：2017-08-02

Applicant: Raytheon Company

Inventor： Kiuchul Hwang ,  Brian D. Schultz ,  Amanda Kerr

IPC: H01L21/02 ,  H01L21/265 ,  H01L29/20 ,  H01L29/66 ,  H01L29/778 ,  H01L29/36 ,  H01L29/207

Abstract: A method includes providing a single crystal substrate having a buffer layer on a surface of the substrate. The buffer layer provides a transition between the crystallographic lattice structure of the substrate and the crystallographic lattice structure of the semiconductor layer and has its resistivity increased by ion implanting a dopant into the buffer layer; and forming semiconductor layer on the ion implanted buffer layer. The semiconductor layer may be a wide bandgap semiconductor layer having a high electron mobility transistors formed therein.

公开(公告)号：US20210050216A1

公开(公告)日：2021-02-18

申请号：US16322731

申请日：2017-08-02

Applicant: Raytheon Company

Inventor： Kiuchul Hwang ,  Brian D. Schultz ,  Amanda Kerr

IPC: H01L21/265 ,  H01L21/02 ,  H01L29/20 ,  H01L29/66 ,  H01L29/778

Abstract: A method includes providing a single crystal substrate having a buffer layer on a surface of the substrate. The buffer layer provides a transition between the crystallographic lattice structure of the substrate and the crystallographic lattice structure of the semiconductor layer and has its resistivity increased by ion implanting a dopant into the buffer layer; and forming semiconductor layer on the ion implanted buffer layer. The semiconductor layer may be a wide bandgap semiconductor layer having a high electron mobility transistors formed therein.

公开(公告)号：US20180286954A1

公开(公告)日：2018-10-04

申请号：US15472708

申请日：2017-03-29

Applicant: Raytheon Company

Inventor： Brian D. Schultz ,  Theodore D. Kennedy ,  Amanda Kerr ,  William E. Hoke

IPC: H01L29/20 ,  H01L21/02

Abstract: A structure having: a nucleation layer; and a Group III-Nitride structure disposed on a surface of the nucleation layer, the Group III-Nitride structure comprising a plurality of pairs of stacked Group III-Nitride layers, each one of the pairs of layers having a lower layer having a 3D growth structure and each one of the upper one of the pairs of layers having a 2D growth structure. Each one of the lower layers at completion has a surface roughness greater than a surface roughness at completion of an upper one of the pair of layers. Interfaces between each one of the upper layers and each one of the lower layers of the plurality of pairs of stacked Group III-Nitride layers have crystallographic dislocation combinations and/or annihilations therein.