公开(公告)号：US20180158816A1

公开(公告)日：2018-06-07

申请号：US15883289

申请日：2018-01-30

Applicant: Renesas Electronics Corporation

Inventor： Satoshi KURA ,  Mitsuo NISSA ,  Keiji SAKAMOTO ,  Taichi IWASAKI

IPC: H01L27/088 ,  H01L49/02 ,  H01L27/108 ,  H01L21/8234

CPC classification number: H01L27/088 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823443 ,  H01L21/823456 ,  H01L27/10808 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/24

Abstract: A first transistor required for decreasing leak current and a second transistor required for compatibility of high speed operation and low power consumption can be formed over an identical substrate and sufficient performance can be provided to the two types of the transistors respectively. Decrease in the leak current is required for the first transistor. Less power consumption and high speed operation are required for the second transistor. The upper surface of a portion of a substrate in which the second diffusion layer is formed is lower than the upper surface of a portion of the substrate where the first diffusion layer is formed.