公开(公告)号：US20180294222A1

公开(公告)日：2018-10-11

申请号：US16009429

申请日：2018-06-15

Applicant: Renesas Electronics Corporation

Inventor： Teruhiro KUWAJIMA ,  Akira MATSUMOTO ,  Yasutaka NAKASHIBA ,  Takashi IWADARE

IPC: H01L23/522

CPC classification number: H01L23/5227 ,  H01L23/4952 ,  H01L23/49551 ,  H01L2224/05554 ,  H01L2224/4813 ,  H01L2224/49175

Abstract: A SOP has a semiconductor chip. The chip includes a pair of a lower layer coil and an upper layer coil laminated through an interlayer insulating film formed therebetween, a first circuit unit electrically coupled to the upper layer coil, and a plurality of electrode pads. Further, it has a wire for electrically coupling the upper layer coil and the first circuit unit, a plurality of inner leads and outer leads arranged around the semiconductor chip, a plurality of wires for electrically coupling the electrode pads of the semiconductor chip and the inner leads, and a resin made sealing member for covering the semiconductor chip. The wire extends along the extending direction of the wires.

公开(公告)号：US20170062332A1

公开(公告)日：2017-03-02

申请号：US15186734

申请日：2016-06-20

Applicant: Renesas Electronics Corporation

Inventor： Teruhiro KUWAJIMA ,  Akira MATSUMOTO ,  Yasutaka NAKASHIBA ,  Takashi IWADARE

IPC: H01L23/522

CPC classification number: H01L23/5227 ,  H01L23/4952 ,  H01L23/49551 ,  H01L2224/05554 ,  H01L2224/4813 ,  H01L2224/49175

Abstract: A SOP has a semiconductor chip. The chip includes a pair of a lower layer coil and an upper layer coil laminated through an interlayer insulating film formed therebetween, a first circuit unit electrically coupled to the upper layer coil, and a plurality of electrode pads. Further, it has a wire for electrically coupling the upper layer coil and the first circuit unit, a plurality of inner leads and outer leads arranged around the semiconductor chip, a plurality of wires for electrically coupling the electrode pads of the semiconductor chip and the inner leads, and a resin made sealing member for covering the semiconductor chip. The wire extends along the extending direction of the wires.

Abstract translation: SOP具有半导体芯片。 芯片包括一对下层线圈和层叠在其间形成的层间绝缘膜的上层线圈，电耦合到上层线圈的第一电路单元和多个电极焊盘。 此外，它具有用于电耦合上层线圈和第一电路单元的导线，布置在半导体芯片周围的多个内部引线和外部引线，用于电连接半导体芯片的电极焊盘和内部 引线和用于覆盖半导体芯片的树脂制密封构件。 电线沿电线的延伸方向延伸。