公开(公告)号：US20160005819A1

公开(公告)日：2016-01-07

申请号：US14738852

申请日：2015-06-13

Applicant: Renesas Electronics Corporation

Inventor： Takahiro Kainuma ,  Takashi Igarashi ,  Hiroshi Inagawa ,  Takeshi Arai ,  Yuji Fujii ,  Takahiro Okamura ,  Hisashi Toyoda

IPC: H01L29/16 ,  H01L29/78 ,  H01L29/872 ,  H01L29/45 ,  H01L29/861

CPC classification number: H01L29/1608 ,  H01L21/0485 ,  H01L29/0619 ,  H01L29/45 ,  H01L29/78 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/8611 ,  H01L29/872

Abstract: Contact resistance between a SiC substrate and an electrode is decreased. When a silicide layer is analyzed by Auger Electron Spectroscopy (AES) sputter in a direction from a titanium layer side to a SiC substrate side, sputtering time corresponding to a depth profile of the silicide layer is defined as ts. In this case, a depth profile of the silicide layer from the titanium layer side in a range of sputtering time from 0.4ts to ts contains a region where titanium atoms determined by the AES sputter accounts for 5 at % or more of all atoms determined by the AES sputter.

Abstract translation: SiC衬底与电极之间的接触电阻降低。 当通过俄歇电子能谱（AES）在从钛层侧到SiC衬底侧的方向上溅射硅化物层时，对应于硅化物层的深度分布的溅射时间定义为ts。 在这种情况下，在从0.4ts到ts的溅射时间范围内，来自钛层侧的硅化物层的深度分布包含由AES溅射测定的钛原子占所有原子的5原子％以上的区域， AES溅射。