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公开(公告)号:US20160260772A1
公开(公告)日:2016-09-08
申请号:US15047746
申请日:2016-02-19
Applicant: Renesas Electronics Corporation
Inventor: Tatsuya USAMI , Yukio MIURA
CPC classification number: H01L43/08 , H01L27/228 , H01L43/12
Abstract: To provide a magnetoresistance effect element configuring MRAM by dry etching and thereby processing a stacked film including magnetic layers, in order to prevent a leakage current from flowing between the magnetic layers, that is, magnetic free layer and magnetic pinned layer which configure a magnetic tunnel junction (MTJ) via a metal deposit that has attached to the side wall of the MTJ. After formation of the magnetoresistance effect element by dry etching, plasma treatment is performed in a gas atmosphere containing carbon and oxygen to remove a metal deposit attached to the magnetoresistance effect element. By this plasma treatment, oxide films are formed on the side walls of the magnetic free layer and the magnetic pinned layer, respectively.
Abstract translation: 为了提供通过干蚀刻配置MRAM并由此处理包括磁性层的层叠膜的磁阻效应元件,以便防止漏磁电流在磁层之间流动,即配置磁隧道的磁性自由层和磁性固定层 (MTJ)通过附着在MTJ侧壁上的金属沉积物。 在通过干蚀刻形成磁阻效应元件之后,在含有碳和氧的气体气氛中进行等离子体处理,以除去附着在磁阻效应元件上的金属沉积物。 通过这种等离子体处理,氧化膜分别形成在磁性自由层和磁性固定层的侧壁上。