公开(公告)号：US20220037223A1

公开(公告)日：2022-02-03

申请号：US17199371

申请日：2021-03-11

Applicant: RichWave Technology Corp.

Inventor： Yu-Lung Wen

IPC: H01L23/31 ,  H01L23/00

Abstract: An electronic package structure includes: a substrate having an upper surface; a solder mask layer disposed on the upper surface of the substrate, at least one outer side of the solder mask layer being aligned with at least one outer side of the substrate; an electronic component with a first surface provided on the upper surface of the substrate; and a cavity located between the electronic component and the solder mask layer. A first surface of the cavity is formed by the first surface of the electronic component.

公开(公告)号：US20230197548A1

公开(公告)日：2023-06-22

申请号：US18113062

申请日：2023-02-23

Applicant: RichWave Technology Corp.

Inventor： Yu-Lung Wen

IPC: H01L23/31 ,  H01L23/00

CPC classification number: H01L23/3121 ,  H01L24/16 ,  H01L24/81 ,  H01L24/26 ,  H01L2224/26145 ,  H01L2224/16227 ,  H01L2224/81815

Abstract: A method of manufacturing an electronic package structure is disclosed. A solder mask layer is formed on an upper surface of a substrate. A recessed area is formed in the solder mask layer. An electronic component is mounted on the substrate. Pads are disposed on the upper surface of the substrate. The pads respectively correspond to the bumps on a first surface of the electronic component. The pads are electrically connected to the bumps. A heat treatment is performed to make the first surface close to the substrate and form a cavity in the recessed area. The cavity is between the first surface of the electronic component, the solder mask layer and the upper surface of the substrate.

公开(公告)号：US12125760B2

公开(公告)日：2024-10-22

申请号：US18113062

申请日：2023-02-23

Applicant: RichWave Technology Corp.

Inventor： Yu-Lung Wen

IPC: H01L23/31 ,  H01L23/00

CPC classification number: H01L23/3121 ,  H01L24/16 ,  H01L24/26 ,  H01L24/81 ,  H01L2224/16227 ,  H01L2224/26145 ,  H01L2224/81815

Abstract: A method of manufacturing an electronic package structure is disclosed. A solder mask layer is formed on an upper surface of a substrate. A recessed area is formed in the solder mask layer. An electronic component is mounted on the substrate. Pads are disposed on the upper surface of the substrate. The pads respectively correspond to the bumps on a first surface of the electronic component. The pads are electrically connected to the bumps. A heat treatment is performed to make the first surface close to the substrate and form a cavity in the recessed area. The cavity is between the first surface of the electronic component, the solder mask layer and the upper surface of the substrate.

公开(公告)号：US11615997B2

公开(公告)日：2023-03-28

申请号：US17199371

申请日：2021-03-11

Applicant: RichWave Technology Corp.

Inventor： Yu-Lung Wen

IPC: H01L23/31 ,  H01L23/00

Abstract: An electronic package structure includes: a substrate having an upper surface; a solder mask layer disposed on the upper surface of the substrate, at least one outer side of the solder mask layer being aligned with at least one outer side of the substrate; an electronic component with a first surface provided on the upper surface of the substrate; and a cavity located between the electronic component and the solder mask layer. A first surface of the cavity is formed by the first surface of the electronic component.