AMPLIFIER CIRCUIT HAVING LOW PARASITIC POLE EFFECT AND BUFFER CIRCUIT THEREOF

    公开(公告)号:US20230198473A1

    公开(公告)日:2023-06-22

    申请号:US18056329

    申请日:2022-11-17

    CPC classification number: H03F1/14 H03F1/42 H03F2200/222

    Abstract: An amplifier circuit having low parasitic pole effect includes a preamplifier, an output transistor and a buffer circuit. The buffer circuit generates a driving signal to control the output transistor according to a preamplification signal generated by the preamplifier. The buffer circuit includes: a buffer input transistor generating the driving signal, wherein an input impedance at its control end is less than that of the output transistor; a low output impedance circuit having an output impedance which is less than an inverting output impedance of the buffer input transistor; an amplification transistor generating an amplification signal at its inverting output; and an amplification stage circuit amplifying the amplification signal by an amplification ratio, so that an equivalent output impedance at a non-inverting output of the buffer input transistor is less than or equal to a product of the reciprocal of an intrinsic output impedance thereof and an amplification ratio.

    HIGH EFFICIENCY SWITCHING CONVERTER AND CONVERSION CONTROL CIRCUIT AND METHOD THEREOF

    公开(公告)号:US20240305186A1

    公开(公告)日:2024-09-12

    申请号:US18488000

    申请日:2023-10-16

    CPC classification number: H02M1/088 H02M1/0009 H02M1/0025 H02M3/158

    Abstract: A switching converter includes: a power stage circuit which includes at least one switch to switch an inductor to convert an input power to an output power; a first loop control circuit configured to switch the at least one switch by a peak current mode according to a first feedback signal related to the output power and an inductor current of the inductor in a first control mode; and a second loop control circuit configured to control the at least one switch to switch with a switching period according to a second feedback signal in a second control mode. If the power stage circuit operates in DCM during consecutively more than a predetermined number of the switching periods, the switching converter enters the first control mode. A portion of sub-circuits of the second loop control circuit are turned off to reduce power consumption in the first control mode.

    State detection circuit for detecting tri-state and state detection method thereof

    公开(公告)号:US12111339B2

    公开(公告)日:2024-10-08

    申请号:US18050928

    申请日:2022-10-28

    CPC classification number: G01R19/1659 G01R31/317

    Abstract: A state detection circuit for detecting whether a state of an input node is floating, grounded, or electrically connected to an external voltage includes: a unidirectional device circuit and a determination circuit. The unidirectional device circuit electrically conducts a test node to a detection node unidirectionally. The detection node is coupled to the input node. The test node, the unidirectional device circuit, the detection node and the input node form a current path. The determination circuit determines a state of the input node according to a voltage level of the detection node. Within a detection stage, the state detection circuit provides a test voltage at the test node. A voltage of the detection node is determined by the input node, the test voltage, and a characteristic of the unidirectional device circuit.

    STATE DETECTION CIRCUIT FOR DETECTING TRI-STATE AND STATE DETECTION METHOD THEREOF

    公开(公告)号:US20230160935A1

    公开(公告)日:2023-05-25

    申请号:US18050928

    申请日:2022-10-28

    CPC classification number: G01R19/1659 G01R31/317

    Abstract: A state detection circuit for detecting whether a state of an input node is floating, grounded, or electrically connected to an external voltage includes: a unidirectional device circuit and a determination circuit. The unidirectional device circuit electrically conducts a test node to a detection node unidirectionally. The detection node is coupled to the input node. The test node, the unidirectional device circuit, the detection node and the input node form a current path. The determination circuit determines a state of the input node according to a voltage level of the detection node. Within a detection stage, the state detection circuit provides a test voltage at the test node. A voltage of the detection node is determined by the input node, the test voltage, and a characteristic of the unidirectional device circuit.

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