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公开(公告)号:US20250132680A1
公开(公告)日:2025-04-24
申请号:US18625511
申请日:2024-04-03
Applicant: Richtek Technology Corporation
Inventor: Tung-Hang Liu , Chi-Jen Yang , Chun-Jen Yu , Tsung-Han Yu
Abstract: A buck-boost switching power circuit comprises a bypass control circuit which configured to determine whether the buck-boost switching power circuit operates in a bypass mode according to a bypass enable signal. When the conversion voltage difference between the input voltage and the output voltage is less than a reference voltage, the bypass control circuit controls to electrically connect the input power source with the output power source, and operates the buck-boost switching power circuit in the bypass phase of the bypass mode. Before and/or after the bypass phase, the bypass control circuit respectively controls the buck-boost switching power circuit to operate in a first transition phase and/or a second transition phase. During the first transition phase or the second transition phase, the bypass control circuit controls the output voltage to gradually change towards the input voltage or target voltage, until the conversion voltage difference is less than the first reference voltage or the output voltage equals the target voltage.
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2.
公开(公告)号:US20230198404A1
公开(公告)日:2023-06-22
申请号:US17858149
申请日:2022-07-06
Applicant: Richtek Technology Corporation
Inventor: Hung-Yu Cheng , Tsung-Han Yu , Keng-Hong Chu
CPC classification number: H02M3/1582 , H02M1/0003
Abstract: A constant time buck-boost switching converter includes: a power switch circuit for switching a first terminal of an inductor between an input voltage and a ground, and for switching a second terminal of the inductor between an output voltage and the ground; and a modulation control circuit for generating a buck ramp signal and a boost ramp signal and for controlling the inductor according to comparisons of these two ramp signals with an error amplification signal, so as to convert the input voltage to the output voltage. The average levels of the buck ramp signal and the boost ramp signal are both equal to a product of the output voltage multiplied by a predetermined ratio. The upper limit of the buck ramp signal and the lower limit of the boost ramp signal are both equal to a product of the input voltage multiplied by the predetermined ratio.
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公开(公告)号:US12273031B2
公开(公告)日:2025-04-08
申请号:US17858149
申请日:2022-07-06
Applicant: Richtek Technology Corporation
Inventor: Hung-Yu Cheng , Tsung-Han Yu , Keng-Hong Chu
Abstract: A constant time buck-boost switching converter includes: a power switch circuit for switching a first terminal of an inductor between an input voltage and a ground, and for switching a second terminal of the inductor between an output voltage and the ground; and a modulation control circuit for generating a buck ramp signal and a boost ramp signal and for controlling the inductor according to comparisons of these two ramp signals with an error amplification signal, so as to convert the input voltage to the output voltage. The average levels of the buck ramp signal and the boost ramp signal are both equal to a product of the output voltage multiplied by a predetermined ratio. The upper limit of the buck ramp signal and the lower limit of the boost ramp signal are both equal to a product of the input voltage multiplied by the predetermined ratio.
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4.
公开(公告)号:US12055964B2
公开(公告)日:2024-08-06
申请号:US18299985
申请日:2023-04-13
Applicant: Richtek Technology Corporation
Inventor: Hung-Yu Cheng , Keng-Hong Chu , Li-Chen Cheng , Tsung-Han Yu
CPC classification number: G05F1/565 , G05F1/561 , H03F3/45273 , H03F3/45475 , H03F2200/261
Abstract: A multi-loop error amplifier circuit for generating an error amplification signal includes: a first operational transconductance amplifier (OTA) including a first current output stage which generates a first transconductance amplification current in a predetermined current direction according to a first voltage difference between a positive terminal and a negative input terminal of the first OTA; a second OTA including a second current output stage which generates a second transconductance amplification current in the predetermined current direction according to a second voltage difference between a positive terminal and a negative input terminal of the second OTA. The first and the second current output stages are coupled in series to generate a first error output current. The error amplification signal is generated according to the first error output current which is equal to the smaller one of the first and the second transconductance amplification currents.
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5.
公开(公告)号:US20230359232A1
公开(公告)日:2023-11-09
申请号:US18299985
申请日:2023-04-13
Applicant: Richtek Technology Corporation
Inventor: Hung-Yu Cheng , Keng-Hong Chu , Li-Chen Cheng , Tsung-Han Yu
CPC classification number: G05F1/565 , H03F3/45273 , G05F1/561 , H03F3/45475 , H03F2200/261
Abstract: A multi-loop error amplifier circuit for generating an error amplification signal includes: a first operational transconductance amplifier (OTA) including a first current output stage which generates a first transconductance amplification current in a predetermined current direction according to a first voltage difference between a positive terminal and a negative input terminal of the first OTA; a second OTA including a second current output stage which generates a second transconductance amplification current in the predetermined current direction according to a second voltage difference between a positive terminal and a negative input terminal of the second OTA. The first and the second current output stages are coupled in series to generate a first error output current. The error amplification signal is generated according to the first error output current which is equal to the smaller one of the first and the second transconductance amplification currents.
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