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    Multiple independent coherence planes for maintaining coherency
    1.
    发明申请
    Multiple independent coherence planes for maintaining coherency 有权
    多个独立的相干平面，用于维持一致性

    公开(公告)号：US20070043911A1

    公开(公告)日：2007-02-22

    申请号：US11205652

    申请日：2005-08-17

    申请人： Ricky Hetherington ,  Stephen Phillips

    发明人： Ricky Hetherington ,  Stephen Phillips

    IPC分类号： G06F13/28

    CPC分类号： G06F13/28 ,  G06F12/0811 ,  G06F12/0813 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/0851

    摘要： In one embodiment, a node comprises at least one processor core and a plurality of coherence units. The processor core is configured to generate an address to access a memory location. The address maps to a first coherence plane of a plurality of coherence planes. Coherence activity is performed within each coherence plane independent of other coherence planes, and a mapping of the address space to the coherence planes is independent of a physical location of the addressed memory in a distributed system memory. Each coherence unit corresponds to a respective coherence plane and is configured to manage coherency for the node and for the respective coherence plane. The coherence units operate independent of each other, and a first coherence unit corresponding to the first coherence plane is coupled to receive the address if external coherency activity is needed to complete the access to the memory location.

    摘要翻译： 在一个实施例中，节点包括至少一个处理器核心和多个相干单元。 处理器核心被配置为生成访问存储位置的地址。 地址映射到多个相干平面的第一相干平面。 在每个相干平面内独立于其他相干平面执行相干活动，并且地址空间与相干平面的映射与分布式系统存储器中所寻址的存储器的物理位置无关。 每个相干单元对应于相应的相干平面，并且被配置为管理节点和相应的相干平面的一致性。 相干单元彼此独立地操作，并且如果需要外部一致性活动来完成对存储器位置的访问，则耦合对应于第一相干面的第一相干单元以接收地址。

    Multi-socked symmetric multiprocessing (SMP) system for chip multi-threaded (CMT) processors
    2.
    发明申请
    Multi-socked symmetric multiprocessing (SMP) system for chip multi-threaded (CMT) processors 有权
    用于芯片多线程（CMT）处理器的多点对称多处理（SMP）系统

    公开(公告)号：US20070043912A1

    公开(公告)日：2007-02-22

    申请号：US11205690

    申请日：2005-08-17

    申请人： Ricky Hetherington ,  Stephen Phillips

    发明人： Ricky Hetherington ,  Stephen Phillips

    IPC分类号： G06F13/28

    CPC分类号： G06F13/387 ,  G06F12/0831

    摘要： In one embodiment, a node comprises a plurality of processor cores, coherency control circuitry coupled to the plurality of processor cores, and at least one coherence unit coupled to the coherency control circuitry. Each processor core is configured to have a plurality of threads active and each processor core includes at least one first level cache. The coherency control circuitry is configured to manage intranode coherency among the plurality of processor cores. The coherency unit is configured to couple to an external interface of the node, and is configured to transmit and receive coherence messages on the external interface to maintain coherency with at least one other node having one or processor cores and a coherence unit. In another embodiment, a system comprises an interconnect and a plurality of nodes coupled to the interconnect.

    摘要翻译： 在一个实施例中，节点包括耦合到多个处理器核心的多个处理器核心，一致性控制电路以及耦合到所述一致性控制电路的至少一个相干单元。 每个处理器核心被配置为具有多个线程活动，并且每个处理器核心包括至少一个第一级高速缓存。 相关性控制电路被配置为管理多个处理器核之间的内部网络一致性。 一致性单元被配置为耦合到节点的外部接口，并且被配置为在外部接口上发送和接收相干消息以保持与至少一个具有一个或多个处理器核心和一致性单元的其他节点的一致性。 在另一个实施例中，系统包括互连和耦合到互连的多个节点。

    Use of FBDIMM Channel as memory channel and coherence channel
    3.
    发明申请
    Use of FBDIMM Channel as memory channel and coherence channel 有权
    使用FBDIMM通道作为内存通道和相干通道

    公开(公告)号：US20070043913A1

    公开(公告)日：2007-02-22

    申请号：US11205706

    申请日：2005-08-17

    申请人： Ricky Hetherington ,  Stephen Phillips

    发明人： Ricky Hetherington ,  Stephen Phillips

    IPC分类号： G06F13/28 ,  G06F13/00

    CPC分类号： G06F13/28 ,  G06F12/0813 ,  G06F12/0815 ,  G06F12/0831

    摘要： In one embodiment, a node comprises at least one memory control unit configured to couple to an industry standard memory interface for coupling to a memory; and at least one coherence unit configured to transmit and receive coherence messages to and from other nodes to maintain coherent memory among the nodes. The coherence messages are conveyed on a second interface to which the coherence unit is coupled, wherein the second interface includes at least a physical layer as specified by the industry standard memory interface.

    摘要翻译： 在一个实施例中，节点包括至少一个存储器控制单元，其被配置为耦合到工业标准存储器接口以耦合到存储器; 以及至少一个相干单元，被配置为向和从其他节点发送和接收相干消息以在所述节点之间维持相干存储器。 相干消息在相干单元耦合到的第二接口上传送，其中第二接口至少包括由工业标准存储器接口指定的物理层。

    Combustor liner with improved heat shield retention
    4.
    发明授权
    Combustor liner with improved heat shield retention 有权
    燃烧器衬管具有改进的隔热保持力

    公开(公告)号：US07845174B2

    公开(公告)日：2010-12-07

    申请号：US11737314

    申请日：2007-04-19

    申请人： Kenneth Parkman ,  Stephen Phillips

    发明人： Kenneth Parkman ,  Stephen Phillips

    IPC分类号： F02C1/00

    CPC分类号： F23R3/002 ,  F23D2211/00 ,  F23R3/60

    摘要： A combustor liner including a dome section having a positioning hole defined at a first radial distance and sized to receive a first heat shield fastener to at least substantially prevent radial and circumferential motion of the first fastener, a circumferential slot sized to receive a second heat shield fastener to at least substantially prevent radial motion of the second fastener while allowing limited circumferential motion of the second fastener, and a clearance hole defined at a second radial distance and sized to receive a third heat shield fastener to allow limited radial and circumferential motion of the third fastener.

    摘要翻译： 一种燃烧器衬套，其包括具有定位孔的圆顶部分，所述定位孔以第一径向距离限定，并且其尺寸被设计成容纳第一热屏蔽紧固件以至少基本上防止所述第一紧固件的径向和周向运动;尺寸适于接收第二热屏蔽 紧固件至少基本上防止第二紧固件的径向运动，同时允许第二紧固件的有限的周向运动，以及限定在第二径向距离处的尺寸设置成容纳第三热屏蔽紧固件的间隙孔，以允许第二紧固件的有限的径向和周向运动 第三紧固件。

    Interface between a combustor and fuel nozzle
    7.
    发明授权
    Interface between a combustor and fuel nozzle 有权
    燃烧器和燃料喷嘴之间的接口

    公开(公告)号：US07926280B2

    公开(公告)日：2011-04-19

    申请号：US11749375

    申请日：2007-05-16

    申请人： Oleg Morenko ,  Kenneth Parkman ,  Stephen Phillips

    发明人： Oleg Morenko ,  Kenneth Parkman ,  Stephen Phillips

    IPC分类号： F02C1/00 ,  F02G3/00

    CPC分类号： F23R3/10 ,  F23R3/002 ,  F23R3/283

    摘要： A floating collar assembly is provided comprising a substantially flat floating collar trapped between a heat shield and a dome panel of the combustor. Axial engagement between the floating collar and the fuel nozzle is maintained via a nozzle cap mounted over the fuel nozzle tip.

    摘要翻译： 提供一种浮动凸环组件，其包括被捕获在燃烧器的隔热罩和顶盖板之间的基本平坦的浮动套环。 通过安装在燃料喷嘴尖端上的喷嘴帽来保持浮动环和燃料喷嘴之间的轴向接合。

    Systems and methods for processing transaction data to perform a merchant chargeback
    10.
    发明申请
    Systems and methods for processing transaction data to perform a merchant chargeback 有权
    用于处理交易数据以执行商家退款的系统和方法

    公开(公告)号：US20070094137A1

    公开(公告)日：2007-04-26

    申请号：US11258216

    申请日：2005-10-26

    申请人： Stephen Phillips ,  Craig Chumney

    发明人： Stephen Phillips ,  Craig Chumney

    IPC分类号： G06Q40/00

    CPC分类号： G06Q20/12 ,  G06Q20/102 ,  G06Q30/06

    摘要： Systems and methods consistent with the present invention may be used as part of determining whether to chargeback a purchase transaction amount to a merchant. To this end, the system may heuristically analyze purchase transaction data to determine which transactions to analyze for chargeback processing. For instance, the system may identify purchase transactions that are likely to qualify for a chargeback. For the identified purchase transactions, the system may then determine an expected value for each transaction in terms of received revenue from chargeback processing and the costs for performing a chargeback. Using the expected values for this transaction data, the system may then prioritize which purchase transactions to review for chargeback to a respective merchant.

    摘要翻译： 与本发明一致的系统和方法可以用作确定是否向商家退还购买交易金额的一部分。 为此，系统可以启发式地分析采购交易数据，以确定哪些交易要进行退款处理。 例如，系统可以识别可能符合退款条件的购买交易。 对于所识别的购买交易，系统可以根据从拒付处理的收到收入和执行退款的成本来确定每个交易的期望值。 使用该交易数据的期望值，系统可以优先考虑哪些购买交易来审查对相应商家的退款。