公开(公告)号：US5758167A

公开(公告)日：1998-05-26

申请号：US535344

申请日：1995-09-28

Applicant: Roberto Bonetti

Inventor： Roberto Bonetti

IPC: G06F13/24 ,  G06F13/26 ,  G06F9/46

CPC classification number: G06F13/24

Abstract: A management unit for microcontrollers equipped with a decoder for a plurality of interrupt channels, the unit being connected to a central processing unit of the microcontroller to decode and transfer thereto a single interrupt digital signal through the decoder, and comprises a first circuit portion for selecting homolog pairs of channels incorporating a modular chain of elements, each having a respective channel pair connected thereto. The first or selection portion is associated with a second decoding circuit portion, and the interrupt signal is a reform of the channel interrupt vector carrying higher priority in the channel pair selected by the chain.

Abstract translation: 一种用于微控制器的管理单元，其配备有用于多个中断通道的解码器，该单元连接到微控制器的中央处理单元，以通过解码器对单个中断数字信号进行解码和传送，并且包括用于选择的第一电路部分 包含元件链的同构对通道，每个通道具有连接到其上的相应通道对。 第一或选择部分与第二解码电路部分相关联，并且中断信号是在链路选择的信道对中承载较高优先级的信道中断向量的改进。