Cycle interleaving during burst mode operation
    1.
    发明授权
    Cycle interleaving during burst mode operation 失效
    突发模式操作期间的周期交织

    公开(公告)号:US3961312A

    公开(公告)日:1976-06-01

    申请号:US488349

    申请日:1974-07-15

    CPC分类号: G06F13/18 G06F13/282

    摘要: Control circuitry in a computer system is responsive to an allow cycle steal signal from an I/O attachment operating in a burst or dedicated data transfer mode and generates control signals whereby the next data storage cycle is made available to an I/O device which is also capable of operating in a cycle steal mode. Upon completion of the next storage cycle, the operation reverts to burst mode and the I/O attachment operating in the burst mode is granted ensuing data storage cycles until it relinquishes a storage cycle to an I/O device capable of using and having a need for it.

    摘要翻译: 计算机系统中的控制电路响应于以突发或专用数据传输模式工作的I / O附件的允许循环窃取信号,并且产生控制信号,从而使得下一个数据存储周期对I / O设备可用 也能够在循环盗取模式下运行。 在下一个存储周期完成后,操作恢复到突发模式,并且在突发模式下操作的I / O附件被授予随后的数据存储周期,直到它将存储周期放弃到能够使用和需要的I / O设备 为了它。