公开(公告)号：US5220654A

公开(公告)日：1993-06-15

申请号：US677027

申请日：1991-03-28

申请人： S. Michael Benson ,  Richard Cwiakala ,  Mark J. Fantacone ,  Jeffrey D. Haggar ,  Alan S. Meritt ,  Harry M. Yudenfriend

发明人： S. Michael Benson ,  Richard Cwiakala ,  Mark J. Fantacone ,  Jeffrey D. Haggar ,  Alan S. Meritt ,  Harry M. Yudenfriend

IPC分类号： G06F13/14 ,  G06F15/16

CPC分类号： G06F15/161

摘要： An installation creates a source I/O definition file (IODF), defining a current system I/O configuration, and a target IODF, defining a future I/O configuration. When the configuration definition is dynamically changed from the current to the target, a serialization mechanism--comprising a "device pin" technique and a "group serialization" technique to handle changed device group definitions--insures that data integrity is not lost on devices undergoing reconfiguration; and a change detection mechanism insures that changes to control structures affected by the dynamic reconfiguration, are noticed by programs accessing those control structures while the structures are changing.

公开(公告)号：US5257368A

公开(公告)日：1993-10-26

申请号：US676603

申请日：1991-03-28

申请人： S. Michael Benson ,  Richard Cwiakala ,  Mark J. Fantacone ,  Jeffrey D. Haggar ,  Dennis D. Koren ,  Allan S. Merritt ,  Michael Schulte ,  Harry M. Yudenfriend

发明人： S. Michael Benson ,  Richard Cwiakala ,  Mark J. Fantacone ,  Jeffrey D. Haggar ,  Dennis D. Koren ,  Allan S. Merritt ,  Michael Schulte ,  Harry M. Yudenfriend

IPC分类号： G06F13/10 ,  G06F13/14 ,  G06F15/16 ,  G06F13/00

CPC分类号： G06F15/161 ,  Y10S707/99931

摘要： An installation creates a source I/O definition file (IODF), defining a current system I/O configuration, and a target IODF, defining a future I/O configuration. An activate function is initiated to change the system's hardware and software definition to correspond to the target IODF. A compare function compares the source and target IODFs, and creates a Configuration Change Block (CCB) to efficiently drive the change process. A validation function validates that the proposed change is valid, and the change process updates the hardware and software configuration definitions. If the change process is successful, a notification is sent; if not, a back-out process restores the I/O configuration to its initial state.

公开(公告)号：US5257379A

公开(公告)日：1993-10-26

申请号：US754813

申请日：1991-09-04

申请人： Richard Cwiakala ,  Jeffrey D. Haggar ,  Charles E. Shapley ,  Timothy J. Spewak ,  David E. Stucki ,  Harry M. Yudenfriend

发明人： Richard Cwiakala ,  Jeffrey D. Haggar ,  Charles E. Shapley ,  Timothy J. Spewak ,  David E. Stucki ,  Harry M. Yudenfriend

IPC分类号： G06F11/14 ,  G06F15/177 ,  G06F3/00 ,  G06F13/00

CPC分类号： G06F11/142 ,  G06F15/177 ,  G06F2201/865

摘要： A data processing I/O system having a main storage for storing data including a software configuration definition and data processing instructions arranged in programs including an operating system, a storage device for storing I/O definition files including hardware configuration information, a processor controller for containing the hardware configuration information, and a hardware storage area (HSA) connected to the processor controller for storing a hardware configuration definition. A hardware configuration definition program (HCD) builds I/O definition files (IODFs), each IODF containing at least one I/O processor configuration definition. Each processor I/O configuration definition has a hardware token for identification. The hardware configuration information for an I/O processor configuration definition, along with a copy of its hardware token, is transferred to the processor controller by an I/O configuration program (IOCP), and a hardware configuration definition is established in the HSA. The copy of the hardware token may be fetched from the HSA and compared to hardware token of the configuration definition used to establish the software configuration definition in the main storage to determine that the software and hardware configuration definitions are synchronized. If the software and hardware configuration definitions are synchronized, dynamic changes may be made to the hardware configuration definition in the HSA. A program parameter is provided to store recovery information such that if a failure occurs during a dynamic change, the previous hardware I/O configuration may be recovered or subsequent changes can be made from the point of failure.

摘要翻译： 一种数据处理I / O系统，具有用于存储包括软件配置定义的数据的主存储器和布置在包括操作系统的程序中的数据处理指令，用于存储包括硬件配置信息的I / O定义文件的存储装置，用于 包含硬件配置信息，以及连接到处理器控制器的硬件存储区域（HSA），用于存储硬件配置定义。 硬件配置定义程序（HCD）构建I / O定义文件（IODF），每个IODF至少包含一个I / O处理器配置定义。 每个处理器的I / O配置定义都有一个用于识别的硬件令牌。 I / O处理器配置定义的硬件配置信息及其硬件令牌的副本通过I / O配置程序（IOCP）传输到处理器控制器，并在HSA中建立硬件配置定义。 可以从HSA中取出硬件令牌的副本，并与用于在主存储器中建立软件配置定义的配置定义的硬件令牌进行比较，以确定软件和硬件配置定义是否同步。 如果软件和硬件配置定义是同步的，则可以对HSA中的硬件配置定义进行动态更改。 提供程序参数以存储恢复信息，使得如果在动态变化期间发生故障，则可以恢复先前的硬件I / O配置或者可以从故障点进行后续的改变。

公开(公告)号：US5197069A

公开(公告)日：1993-03-23

申请号：US805263

申请日：1991-12-09

申请人： Thomas E. Cook ,  Mark J. Fantacone ,  Iwao Hatanaka ,  Harry M. Yudenfriend

发明人： Thomas E. Cook ,  Mark J. Fantacone ,  Iwao Hatanaka ,  Harry M. Yudenfriend

IPC分类号： G06F11/00 ,  G06F11/22

CPC分类号： G06F11/2289

摘要： A switching error detection and recovery mechanism recognizes that an I/O configuration has changed. Comparing new configuration data to previous data maintained in a CDT table structure, and detecting unequal path information, an error condition is recognized. After recognizing the error condition, recovery actions are taken to notify the operator and insure data integrity. The CDT is structured so that redundant data is eliminated, and so records may be efficiently and dynamically added and deleted.

摘要翻译： 切换错误检测和恢复机制识别出I / O配置发生了变化。 将新配置数据与CDT表格结构中维护的先前数据进行比较，并检测不等路径信息，可以识别错误状况。 在识别错误​​状况后，采取恢复操作通知操作员并确保数据完整性。 CDT的结构使得冗余数据被消除，因此可以有效地和动态地添加和删除记录。

公开(公告)号：US5465355A

公开(公告)日：1995-11-07

申请号：US150748

申请日：1993-11-12

申请人： Thomas E. Cook ,  Mark J. Fantacone ,  Robert E. Galbraith ,  Steven G. Glassen ,  Allan S. Meritt ,  Kenneth J. Oakes ,  Harry M. Yudenfriend

发明人： Thomas E. Cook ,  Mark J. Fantacone ,  Robert E. Galbraith ,  Steven G. Glassen ,  Allan S. Meritt ,  Kenneth J. Oakes ,  Harry M. Yudenfriend

IPC分类号： G06F13/10 ,  G06F13/20 ,  G06F13/00 ,  G06F13/14

CPC分类号： G06F13/10 ,  G06F13/20

摘要： A data processing I/O system including a main storage for storing data and data processing instructions arranged in software programs, and a channel subsystem having hardware for reporting conditions in the channel subsystem to the software. A special Channel Subsystem Call (CHSC) instruction is used to store event information from the channel subsystem into the main memory for use by the software such that new or restored resources such as a channel path, a channel path and partial control unit link address, or a channel path and full control unit link address, may be originally made accessible, or may be restored to the I/O system. A mechanism is also provided to inquire of a device how long it expects to not be accessible to give the device sufficient time to reset itself before it is varied offline, thus preventing a device from being isolated or "boxed" prematurely.

摘要翻译： 一种数据处理I / O系统，包括用于存储以软件程序排列的数据和数据处理指令的主存储器，以及具有用于向该软件报告信道子系统中的条件的硬件的通道子系统。 专用信道子系统呼叫（CHSC）指令用于将来自信道子系统的事件信息存储到主存储器中以供软件使用，以便新的或恢复的资源，例如信道路径，信道路径和部分控制单元链路地址， 或通道路径和全控制单元链路地址，可以原来可访问，或者可以被还原到I / O系统。 还提供了一种机制来查询设备，其期望无法访问多长时间，以便在离线之前给设备足够的时间重置自身，从而防止设备过早隔离或“盒装”。

公开(公告)号：US5107496A

公开(公告)日：1992-04-21

申请号：US424456

申请日：1989-10-20

申请人： Thomas E. Cook ,  Mark J. Fantacone ,  Iwao Hatanaka ,  Harry M. Yudenfriend

发明人： Thomas E. Cook ,  Mark J. Fantacone ,  Iwao Hatanaka ,  Harry M. Yudenfriend

IPC分类号： G06F13/14 ,  G06F11/00 ,  G06F11/22 ,  G06F13/00

CPC分类号： G06F11/2289

摘要： A switching error detection and recovery mechanism recognizes that an I/O configuration has changed. Comparing new configuration data to previous data maintained in a CDT table structure, and detecting unequal path information, an error condition is recognized. After recognizing the error condition, recovery actions are taken to notify the operator and insure data integrity. The CDT is structured so that redundant data is eliminated, and so records may be efficiently and dynamically added and deleted.

公开(公告)号：US07568052B1

公开(公告)日：2009-07-28

申请号：US09407544

申请日：1999-09-28

申请人： Richard Cwiakala ,  William J. Rooney ,  Peter B. Yocom ,  Harry M. Yudenfriend

发明人： Richard Cwiakala ,  William J. Rooney ,  Peter B. Yocom ,  Harry M. Yudenfriend

IPC分类号： G06F13/10 ,  G06F9/50

CPC分类号： G06F9/5011

摘要： Input/output (I/O) configurations of a computing environment are managed. This management includes dynamically adjusting an I/O configuration, when it is determined that such an adjustment is needed or desired. In order to make the adjustment, a channel path is selected from a plurality of channel paths. The selection of the channel path to be used in the adjustment is based on one or more characteristics associated with the channel path.

摘要翻译： 管理计算环境的输入/输出（I / O）配置。 当确定需要或期望这样的调整时，该管理包括动态地调整I / O配置。 为了进行调整，从多个信道路径选择信道路径。 在调整中使用的信道路径的选择基于与信道路径相关联的一个或多个特性。

公开(公告)号：US5170472A

公开(公告)日：1992-12-08

申请号：US693997

申请日：1991-03-28

申请人： Richard Cwiakala ,  Eugene P. Hefferon ,  Kenneth J. Oakes ,  Allen H. Preston ,  David E. Stucki ,  Leslie W. Wyman ,  Harry M. Yudenfriend

发明人： Richard Cwiakala ,  Eugene P. Hefferon ,  Kenneth J. Oakes ,  Allen H. Preston ,  David E. Stucki ,  Leslie W. Wyman ,  Harry M. Yudenfriend

IPC分类号： G06F13/10 ,  G06F13/14 ,  G06F15/16

CPC分类号： G06F15/161

摘要： A mechanism for changing the system I/O configuration definition in the channel subsystem of a data processing system without having to do a power on reset operation. The data processing system includes one or more central processing units, an I/O processor, a storage addressable by the central processors and the I/O processor, and a command mechanism for creating command-request blocks in the storage, each of which contains a requested command and data for the I/O Processor to add, delete or change elements of the I/O configuration definitions of the channel subsystem. Response-blocks are created in the storage for passing status information from the I/O processor to the central processing unit(s) indicating either successful execution of the requested command or that the I/O configuration definitions were unchanged by the command of the request-block, or when associated functions may have been performed in the execution of the command of the request-block by the I/O processor.

公开(公告)号：US09058275B2

公开(公告)日：2015-06-16

申请号：US13157735

申请日：2011-06-10

申请人： Peter D. Driever ,  Steven G. Glassen ,  Kenneth J. Oakes ,  Peter G. Sutton ,  Peter K. Szwed ,  Harry M. Yudenfriend

发明人： Peter D. Driever ,  Steven G. Glassen ,  Kenneth J. Oakes ,  Peter G. Sutton ,  Peter K. Szwed ,  Harry M. Yudenfriend

IPC分类号： G06F12/02 ,  G06F13/12 ,  G06F13/28 ,  G06F11/08 ,  G06F11/07

CPC分类号： G06F9/3861 ,  G06F3/0619 ,  G06F3/0635 ,  G06F3/0689 ,  G06F9/30032 ,  G06F9/30043 ,  G06F11/0775 ,  G06F11/085 ,  G06F12/0246 ,  G06F13/124 ,  G06F13/28

摘要： An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.

摘要翻译： 提供存储类存储器的抽象，其隐藏来自程序的存储类存储器的实现的细节，并且提供用于执行某些动作的标准通道编程接口，例如控制主存储和存储类存储器之间的数据移动或管理 存储类内存

公开(公告)号：US08812742B2

公开(公告)日：2014-08-19

申请号：US13523958

申请日：2012-06-15

申请人： John R. Flanagan ,  Francis Gassert ,  Kenneth J. Oakes ,  Dale F. Riedy ,  Peter G. Sutton ,  John Trotter ,  Harry M. Yudenfriend

发明人： John R. Flanagan ,  Francis Gassert ,  Kenneth J. Oakes ,  Dale F. Riedy ,  Peter G. Sutton ,  John Trotter ,  Harry M. Yudenfriend

IPC分类号： G06F3/00 ,  H04M1/00

CPC分类号： G06F13/4022

摘要： A computer system includes a processor configured for detecting initial command response times of a plurality of paths for transmitting signals from the processor to one or more external devices via a plurality of channels, assigning weighted values to the plurality of paths based on the detected initial command response times, and modifying a frequency at which respective paths among the plurality of paths are selected for transmitting the signals based on the weighted values assigned to the respective paths.

摘要翻译： 计算机系统包括：处理器，被配置为检测多个路径的初始命令响应时间，用于经由多个信道将信号从处理器发送到一个或多个外部设备;基于检测到的初始命令向多个路径分配加权值 响应时间，以及修改多个路径中的相应路径被选择用于基于分配给相应路径的加权值来发送信号的频率。