Semiconductor package
    1.
    发明授权

    公开(公告)号:US10804215B2

    公开(公告)日:2020-10-13

    申请号:US16418876

    申请日:2019-05-21

    摘要: A semiconductor package comprising: a frame having an opening and including wiring layers and one or more layer of connection vias; a semiconductor chip disposed in the opening and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant covering the frame and the semiconductor chip and filling the opening; a connection structure disposed on the frame and the active surface of the semiconductor chip, and including one or more redistribution layers electrically connected to the connection pads and the wiring layers; one or more passive components disposed on the connection structure; a molding material covering each of the passive components; and a metal layer covering outer surfaces of each of the frame, the connection structure, and the molding material. The metal layer is connected to a ground pattern included in the wiring layers of the frame.

    Semiconductor package having through-hole including shielding wiring structure

    公开(公告)号:US11037884B2

    公开(公告)日:2021-06-15

    申请号:US16433439

    申请日:2019-06-06

    摘要: A semiconductor package includes: a frame having a first surface and a second surface opposing each other, and including a through-hole and a wiring structure connected to the first surface and the second surface; a connection structure disposed on the first surface of the frame and including a redistribution layer; a semiconductor chip disposed in the through-hole and including connection pads connected to the redistribution layer; an encapsulant encapsulating the semiconductor chip and covering the second surface of the frame; and a plurality of electrical connection metal members disposed on the second surface of the frame and connected to the wiring structure. The wiring structure includes a shielding wiring structure surrounding the through-hole, and the plurality of electrical connection metal members include a plurality of grounding electrical connection metal members connected to the shielding wiring structure.

    SEMICONDUCTOR PACKAGE
    3.
    发明申请

    公开(公告)号:US20200176391A1

    公开(公告)日:2020-06-04

    申请号:US16418876

    申请日:2019-05-21

    摘要: A semiconductor package comprising: a frame having an opening and including wiring layers and one or more layer of connection vias; a semiconductor chip disposed in the opening and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant covering the frame and the semiconductor chip and filling the opening; a connection structure disposed on the frame and the active surface of the semiconductor chip, and including one or more redistribution layers electrically connected to the connection pads and the wiring layers; one or more passive components disposed on the connection structure; a molding material covering each of the passive components; and a metal layer covering outer surfaces of each of the frame, the connection structure, and the molding material. The metal layer is connected to a ground pattern included in the wiring layers of the frame.