公开(公告)号：US10042731B2

公开(公告)日：2018-08-07

申请号：US14453106

申请日：2014-08-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Lae Park ,  Byeong-Jun Lee

IPC: G06F1/32 ,  G06F11/30 ,  G06F1/20

Abstract: A system-on-chip includes a symmetric multi-processor including a plurality of cores, each configured to operate in a high performance operating mode and a low performance operating mode. The system-on-chip further includes a clock management unit configured to provide an operating clock signal to the symmetric multi-processor, a state management unit configured to monitor operating states of the cores, a temperature management unit configured to monitor a temperature of the symmetric multi-processor, and a symmetric multi-processor control unit configured to determine the operating clock signal and the operating states of the cores based on a workload of the symmetric multi-processor. The symmetric multi-processor control unit is further configured to differentially determine a maximum operating clock frequency for the cores based on the temperature and the operating states of the cores, which indicate a quantity of cores that are currently in operation.