公开(公告)号：US11257841B2

公开(公告)日：2022-02-22

申请号：US16787195

申请日：2020-02-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Kyu Kang ,  Woojae Jang ,  Changsub Lee ,  Sejun Park ,  Jaeduk Lee ,  Jung Hoon Lee

IPC: H01L27/11582 ,  H01L29/792 ,  H01L29/423 ,  H01L29/78

Abstract: A three-dimensional semiconductor memory device including a stack structure including gate structures and first dielectric patterns alternately stacked, a vertical channel penetrating the stack structure, and a charge storage layer extending from between the vertical channel and the first gate structures to between the vertical channel and the first dielectric patterns. The gate structures include first gate structures having a top surface and a bottom surface facing each other and having different width. The charge storage layer includes first segments between the vertical channel and the first gate structures, and second segments between the vertical channel and the first dielectric patterns. A thickness of the first segments is greater than a thickness of the second segments. One of the width of the top surface and the width of bottom surface of each first gate structure is the same as that of a first dielectric pattern on the first gate structure.

公开(公告)号：US09831265B2

公开(公告)日：2017-11-28

申请号：US15165135

申请日：2016-05-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nambin Kim ,  Daewoong Kang ,  Dae Sin Kim ,  Kwang Soo Seol ,  Homin Son ,  Changsub Lee ,  Seunghyun Lim ,  Sunghoi Hur

IPC: H01L23/48 ,  H01L27/11582 ,  H01L27/1157

CPC classification number: H01L27/11582 ,  H01L27/1157

Abstract: Provided is a semiconductor device including a substrate, gate electrodes vertically stacked on the substrate, insulating patterns between the gate electrodes, an active pillar provided to penetrate the gate electrodes and the insulating patterns and electrically coupled with the substrate, and a memory pattern provided between the gate electrodes and the active pillar and between the insulating patterns and the active pillar. The gate electrodes include edge portions extending between the memory pattern and the insulating patterns.