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1.
公开(公告)号:US20220084478A1
公开(公告)日:2022-03-17
申请号:US17361755
申请日:2021-06-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Beophee KIM , Sungjin LIM , Yongjoo SONG , Chulho CHOI , Hanchiang SU , Yichien WEN
IPC: G09G3/36
Abstract: A display apparatus includes a display panel including a plurality of horizontal lines each including a plurality of pixels, a timing controller configured to output a polarity control signal representing a polarity corresponding to each of the plurality of horizontal lines and having a value inverted by n horizontal line units, and a source driver configured to generate a timing pulse signal sequentially representing a data charging time of each of the plurality of horizontal lines and to output a data voltage, having a polarity corresponding to each of the plurality of horizontal lines, to the display panel on the basis of the timing pulse signal. When a value of the polarity control signal is inverted, the source driver generates the timing pulse signal including a data charging time corresponding to a count value obtained by counting a number of horizontal lines after a polarity is inverted.
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公开(公告)号:US20220262317A1
公开(公告)日:2022-08-18
申请号:US17668018
申请日:2022-02-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Tao-Jung HUNG , Chao Hsuan LIU , Chulho CHOI , Hajoon SHIN , Chui-Hsun CHIU , Myungho SEO , Yu-Wen CHIOU
IPC: G09G3/3275
Abstract: A display driving circuit including a reference voltage generator configured to generate a plurality of reference voltages, a buffer circuit configured to generate an output voltage based on a reference voltage, from among the reference voltages, applied to an input node thereof, and a precharging circuit configured to precharge the input node based on a first control signal in a transition period, which is a time period between a first point in time at which a first reference voltage is applied to the input node and a second point in time at which a second reference voltage is applied to the input node, may be provided.
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3.
公开(公告)号:US20230215318A1
公开(公告)日:2023-07-06
申请号:US18061616
申请日:2022-12-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Chulho CHOI , Yongjoo SONG
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2300/0408
Abstract: A display device includes a display panel including data lines configured to receive an image signal, gate lines configured to receive a scan signal, and gate connection lines configured to transmit the scan signal to the gate lines; and a multi-chip film package including, on a film, a first gate integrated circuit (IC) configured to transmit a first scan signal to the gate connection lines through first gate output lines, a second gate IC configured to transmit a second scan signal to the gate connection lines through second gate output lines, and a source IC configured to transmit the image signal to the data lines through source output lines. Each of the first gate output lines is between two adjacent source output lines, and each of the second gate output lines is between two adjacent source output lines.
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4.
公开(公告)号:US20190221182A1
公开(公告)日:2019-07-18
申请号:US16359502
申请日:2019-03-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chulho CHOI
CPC classification number: G09G3/3688 , G09G3/2092 , G09G3/3648 , G09G2310/027 , G09G2310/0275 , G09G2310/0289 , G09G2310/0291 , G09G2330/021 , G09G2330/026 , G09G2330/027 , G09G2330/08 , G09G2370/08
Abstract: A source driver circuit includes a receiver, a plurality of amplifying buffers, and a control logic circuit. The receiver receives a data signal and a control signal through an input terminal. Each of the amplifying buffers outputs a driving signal generated based on the image data signal through an output terminal. The control logic circuit controls the receiver and the plurality of amplifying buffers based on the control signal. When a power-down signal is provided to the receiver, the control logic circuit is to turn off at least one of the receiver and the plurality of amplifying buffers.
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公开(公告)号:US20180190235A1
公开(公告)日:2018-07-05
申请号:US15910334
申请日:2018-03-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chulho CHOI
CPC classification number: G09G3/3688 , G09G3/2092 , G09G3/3648 , G09G2310/027 , G09G2310/0275 , G09G2310/0289 , G09G2310/0291 , G09G2330/021 , G09G2330/026 , G09G2330/027 , G09G2330/08 , G09G2370/08
Abstract: A source driver circuit includes a receiver, a plurality of amplifying buffers, and a control logic circuit. The receiver receives a data signal and a control signal through an input terminal. Each of the amplifying buffers outputs a driving signal generated based on the image data signal through an output terminal. The control logic circuit controls the receiver and the plurality of amplifying buffers based on the control signal. When a power-down signal is provided to the receiver, the control logic circuit is to turn off at least one of the receiver and the plurality of amplifying buffers.
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公开(公告)号:US20220392383A1
公开(公告)日:2022-12-08
申请号:US17717590
申请日:2022-04-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Chulho CHOI , Yongjoo SONG
IPC: G09G3/20
Abstract: A display device includes a display panel including data lines configured to receive an image signal, gate lines configured to receive a scan signal, and gate connection lines configured to transmit the scan signal to the gate lines; and a multi-chip film package including, on a film, a first gate integrated circuit (IC) configured to transmit a first scan signal to the gate connection lines through first gate output lines, a second gate IC configured to transmit a second scan signal to the gate connection lines through second gate output lines, and a source IC configured to transmit the image signal to the data lines through source output lines. Each of the first gate output lines is between two adjacent source output lines, and each of the second gate output lines is between two adjacent source output lines.
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公开(公告)号:US20220223087A1
公开(公告)日:2022-07-14
申请号:US17519724
申请日:2021-11-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Shih Chiao HUANG , Jinwoo KIM , Tao-Jung HUNG , Chulho CHOI , Hajoon SHIN , Myungho SEO , Yongjoo SONG , Shih-Hsiung KUO , Chui-Hsun CHIU , Jia Wei CHEN , Chao Hsuan LIU , Yu-Wen CHIOU
IPC: G09G3/20
Abstract: A display driving integrated circuit includes a common voltage buffer configured to provide a common voltage to a display panel and when a line outputting the common voltage and a gate line are short-circuited, apply a first current to the gate line or receive a second current from the gate line; a current generator configured to sum currents respectively corresponding to the first current and the second current and output an output current obtained by the summing; and a current detector configured to convert the output current into an output voltage and output a high or low signal based on a result of comparing the output voltage with a preset voltage.
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公开(公告)号:US20180018910A1
公开(公告)日:2018-01-18
申请号:US15648923
申请日:2017-07-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Minhwa JANG , Chulho CHOI , Hyunje PARK
IPC: G09G3/00
CPC classification number: G09G3/006 , G09G3/2092 , G09G2300/0421 , G09G2310/08 , G09G2330/12
Abstract: A display driver device includes a timing controller, a display driver integrated circuit, a flexible printed circuit board, a connection line, and a test line. The timing controller includes an output pad unit. The display driver integrated circuit includes an input pad unit. The connection line is formed at the flexible printed circuit board to electrically connect the input pad unit with the output pad unit. The test line is formed at the flexible printed circuit board, and is used to provide a test signal to the input pad unit. The display driver device operates in a normal mode or operates in the test mode based on a test mode signal.
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