公开(公告)号：US20230215318A1

公开(公告)日：2023-07-06

申请号：US18061616

申请日：2022-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chulho CHOI ,  Yongjoo SONG

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/0267 ,  G09G2300/0408

Abstract: A display device includes a display panel including data lines configured to receive an image signal, gate lines configured to receive a scan signal, and gate connection lines configured to transmit the scan signal to the gate lines; and a multi-chip film package including, on a film, a first gate integrated circuit (IC) configured to transmit a first scan signal to the gate connection lines through first gate output lines, a second gate IC configured to transmit a second scan signal to the gate connection lines through second gate output lines, and a source IC configured to transmit the image signal to the data lines through source output lines. Each of the first gate output lines is between two adjacent source output lines, and each of the second gate output lines is between two adjacent source output lines.

公开(公告)号：US20220084478A1

公开(公告)日：2022-03-17

申请号：US17361755

申请日：2021-06-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Beophee KIM ,  Sungjin LIM ,  Yongjoo SONG ,  Chulho CHOI ,  Hanchiang SU ,  Yichien WEN

IPC: G09G3/36

Abstract: A display apparatus includes a display panel including a plurality of horizontal lines each including a plurality of pixels, a timing controller configured to output a polarity control signal representing a polarity corresponding to each of the plurality of horizontal lines and having a value inverted by n horizontal line units, and a source driver configured to generate a timing pulse signal sequentially representing a data charging time of each of the plurality of horizontal lines and to output a data voltage, having a polarity corresponding to each of the plurality of horizontal lines, to the display panel on the basis of the timing pulse signal. When a value of the polarity control signal is inverted, the source driver generates the timing pulse signal including a data charging time corresponding to a count value obtained by counting a number of horizontal lines after a polarity is inverted.

公开(公告)号：US20180082654A1

公开(公告)日：2018-03-22

申请号：US15686317

申请日：2017-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongjoo SONG ,  Pan-soo KIM ,  Jin-woo KIM ,  Ju-hyun KO

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3614 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2320/0673 ,  H03F3/303 ,  H03F3/45192 ,  H03F3/45475

Abstract: A source driver includes an interpolation amplifier configured to generate an interpolation voltage based on a received plurality of input voltages and output the interpolation voltage to a display panel; and an input selector configured to receive a first voltage and a second voltage having a different level from the first voltage, and configured to selectively provide at least one of the first and second voltages as the plurality of input voltages in response to some of the lower bits of pixel data. The interpolation amplifier includes four conductive differential input pairs configured to receive four input voltages from among the plurality of input voltages, respectively. Each of the first differential input pair and third differential input pair comprises a first type transistor. Each of the second differential input pair and fourth differential input pair comprises a second type transistor.

公开(公告)号：US20200335045A1

公开(公告)日：2020-10-22

申请号：US16803042

申请日：2020-02-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jiyong JEONG ,  Yongjoo SONG ,  Jeongah AHN ,  Hajun LEE ,  Youngsub JIN

IPC: G09G3/3291

Abstract: A display driving circuit is provided. The circuit drives a display panel that includes data lines, sensing lines, and sub-pixels connected to the data lines and the sensing lines. The display driving circuit includes a data driver integrated circuit that drives the data lines. The data driver integrated circuit includes a driving block and a sensing block. The driving block includes plural digital-analog converters (DACs) each performing digital-analog conversion with respect to received sub-pixel data to generate output voltages and provide the output voltages of the DACs to the data lines. The sensing block measures grayscale voltages output from the DACs in a first operation mode and measures pixel voltages of the sub-pixels received from the sensing lines in a second operation mode.

公开(公告)号：US20230335066A1

公开(公告)日：2023-10-19

申请号：US18213632

申请日：2023-06-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jiyong JEONG ,  Yongjoo SONG ,  Jeongah AHN ,  Hajun LEE ,  Youngsub JIN

IPC: G09G3/3291

CPC classification number: G09G3/3291 ,  G09G2310/027

Abstract: A display driving circuit is provided. The circuit drives a display panel that includes data lines, sensing lines, and sub-pixels connected to the data lines and the sensing lines. The display driving circuit includes a data driver integrated circuit that drives the data lines. The data driver integrated circuit includes a driving block and a sensing block. The driving block includes plural digital-analog converters (DACs) each performing digital-analog conversion with respect to received sub-pixel data to generate output voltages and provide the output voltages of the DACs to the data lines. The sensing block measures grayscale voltages output from the DACs in a first operation mode and measures pixel voltages of the sub-pixels received from the sensing lines in a second operation mode.

公开(公告)号：US20220392383A1

公开(公告)日：2022-12-08

申请号：US17717590

申请日：2022-04-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chulho CHOI ,  Yongjoo SONG

IPC: G09G3/20

Abstract: A display device includes a display panel including data lines configured to receive an image signal, gate lines configured to receive a scan signal, and gate connection lines configured to transmit the scan signal to the gate lines; and a multi-chip film package including, on a film, a first gate integrated circuit (IC) configured to transmit a first scan signal to the gate connection lines through first gate output lines, a second gate IC configured to transmit a second scan signal to the gate connection lines through second gate output lines, and a source IC configured to transmit the image signal to the data lines through source output lines. Each of the first gate output lines is between two adjacent source output lines, and each of the second gate output lines is between two adjacent source output lines.

公开(公告)号：US20220223087A1

公开(公告)日：2022-07-14

申请号：US17519724

申请日：2021-11-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Shih Chiao HUANG ,  Jinwoo KIM ,  Tao-Jung HUNG ,  Chulho CHOI ,  Hajoon SHIN ,  Myungho SEO ,  Yongjoo SONG ,  Shih-Hsiung KUO ,  Chui-Hsun CHIU ,  Jia Wei CHEN ,  Chao Hsuan LIU ,  Yu-Wen CHIOU

IPC: G09G3/20

Abstract: A display driving integrated circuit includes a common voltage buffer configured to provide a common voltage to a display panel and when a line outputting the common voltage and a gate line are short-circuited, apply a first current to the gate line or receive a second current from the gate line; a current generator configured to sum currents respectively corresponding to the first current and the second current and output an output current obtained by the summing; and a current detector configured to convert the output current into an output voltage and output a high or low signal based on a result of comparing the output voltage with a preset voltage.