公开(公告)号：US09634024B2

公开(公告)日：2017-04-25

申请号：US14642086

申请日：2015-03-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kohji Kanamori ,  Chung-Jin Kim ,  Young-Woo Park ,  Jae-Goo Lee ,  Jae-Duk Lee ,  Moo-Rym Choi

IPC: H01L29/792 ,  H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

CPC classification number: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

Abstract: A semiconductor device is provided. Word lines are formed on a substrate. An air gap is interposed between two adjacent word lines. A channel structure penetrates through the word lines and the air gap. A memory cell is interposed between each word line and the channel structure. The memory cell includes a blocking pattern, a charge trap pattern and a tunneling insulating pattern. The blocking pattern conformally covers a top surface, a bottom surface, and a first side surface of each word line. The first side surface is adjacent to the channel structure. The charge trap pattern is interposed only between the first side surface and the channel structure.