PROCESSOR DEVICE COLLECTING PERFORMANCE INFORMATION THROUGH COMMAND-SET-BASED REPLAY

    公开(公告)号:US20190213010A1

    公开(公告)日:2019-07-11

    申请号:US16132784

    申请日:2018-09-17

    CPC classification number: G06F9/3836 G06F9/30101 G06F11/3409

    Abstract: A processor device includes a scheduler and a performance counter. The scheduler schedules commands of a first command set and commands of a second command set for a functional unit. A performance counter counts numbers of times where events of interest respectively occur while the functional unit processes first operations directed by the first command set and second operations directed by the second command set. The commands of the first command set are repeatedly scheduled such that the numbers of times for all the events of interest are counted with regard to the first operations. The commands of the second command set are scheduled after the numbers of times for all the events of interest are counted with regard to the first operations.

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