公开(公告)号：US20250021227A1

公开(公告)日：2025-01-16

申请号：US18735491

申请日：2024-06-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNGSAM SHIN ,  DEOK JAE OH

IPC: G06F3/06

Abstract: A memory management method based on a compressed memory and an apparatus using the same are provided. A memory device includes a memory and a near memory processing unit. The memory includes a normal memory area for storing uncompressed data and a compressed memory area for storing compressed data. The near memory processing unit is configured to receive a first command to frontswap-store a huge page, which is stored in the normal memory area, in the compressed memory area; identify addresses of sub-pages of the huge page based on an address of the huge page; compress the sub-pages using the addresses of the sub-pages to generate compressed sub-pages; and store the compressed sub-pages in the compressed memory area. A size of the huge page is larger than a regular page.

公开(公告)号：US20250013578A1

公开(公告)日：2025-01-09

申请号：US18763105

申请日：2024-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNGSAM SHIN ,  DEOK JAE OH ,  YEONGON CHO

IPC: G06F12/1009 ,  G06F12/1036 ,  G06F12/1081

Abstract: A memory device includes a memory and a controller. The memory is configured to store data. The controller is configured to receive first address data based on multi-level paging from a processing unit, convert the first address data into second address data by performing on at least one of levels a page table walk of the multi-level paging, and access the memory using the second address data.

公开(公告)号：US20240231614A9

公开(公告)日：2024-07-11

申请号：US18191254

申请日：2023-03-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEONGWOOK PARK ,  DEOK JAE OH ,  YOUNGSAM SHIN ,  YEONGON CHO ,  YONGMIN TAI

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/064 ,  G06F3/0673

Abstract: A near-memory processing unit is configured to compress a page present in a normal memory space of a memory when receiving a swap-out command from a host, allocate a memory area in which the compressed page is to be stored in a compressed memory space which is a memory area previously allocated by the host, copy the compressed page into the allocated memory area, generate an entry corresponding to the compressed page, and insert the generated entry into an entry tree.

公开(公告)号：US20190213010A1

公开(公告)日：2019-07-11

申请号：US16132784

申请日：2018-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： YOUNGSAM SHIN ,  DONG-HOON YOO ,  Young-Hwan HEO

IPC: G06F9/38 ,  G06F9/30 ,  G06F11/34

CPC classification number: G06F9/3836 ,  G06F9/30101 ,  G06F11/3409

Abstract: A processor device includes a scheduler and a performance counter. The scheduler schedules commands of a first command set and commands of a second command set for a functional unit. A performance counter counts numbers of times where events of interest respectively occur while the functional unit processes first operations directed by the first command set and second operations directed by the second command set. The commands of the first command set are repeatedly scheduled such that the numbers of times for all the events of interest are counted with regard to the first operations. The commands of the second command set are scheduled after the numbers of times for all the events of interest are counted with regard to the first operations.

公开(公告)号：US20240152278A1

公开(公告)日：2024-05-09

申请号：US18327323

申请日：2023-06-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Maksim Ostapenko ,  YOUNGSAM SHIN

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0631 ,  G06F3/0673 ,  G06F3/0656

Abstract: An electronic device comprises a host processor comprising a memory controller connected to a memory device comprising a near memory processing unit. The host processor is configured to detect a system memory shortage for an operation of an operating system (OS), configure a memory region of the memory device for use in a memory pool of the OS in response to the system memory shortage, identify a request to execute an acceleration logic, and configure the memory region of the memory device for direct access by the near memory processing unit in response to the request to execute the acceleration logic.

公开(公告)号：US20240134522A1

公开(公告)日：2024-04-25

申请号：US18191254

申请日：2023-03-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEONGWOOK PARK ,  DEOK JAE OH ,  YOUNGSAM SHIN ,  YEONGON CHO ,  YONGMIN TAI

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/064 ,  G06F3/0673

Abstract: A near-memory processing unit is configured to compress a page present in a normal memory space of a memory when receiving a swap-out command from a host, allocate a memory area in which the compressed page is to be stored in a compressed memory space which is a memory area previously allocated by the host, copy the compressed page into the allocated memory area, generate an entry corresponding to the compressed page, and insert the generated entry into an entry tree.

公开(公告)号：US20230132500A1

公开(公告)日：2023-05-04

申请号：US17966200

申请日：2022-10-14

Applicant: Samsung Electronics Co., Ltd. ,  Graz University of Technology

Inventor： Sujoy Sinha Roy ,  Ahmet Can Mert ,  Aikata ,  Sunmin Kwon ,  YOUNGSAM SHIN ,  DONG-HOON YOO

IPC: H04L9/00 ,  H04L9/30 ,  H04L9/06

Abstract: Disclosed are apparatuses and methods with crypto processing. Computing devices may be interconnected to each other. Each computing device may be configured to perform polynomial operations based on homomorphic encryption. Memories may be configured to store instructions. Controllers may be configured to transfer instructions from the memories to the computing devices. One or more of the computing devices may each be configured to individually process, in parallel, at least a portion of the polynomial operations based on the homomorphic encryption according to an instruction transferred from a corresponding memory.