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公开(公告)号:US20220139901A1
公开(公告)日:2022-05-05
申请号:US17338201
申请日:2021-06-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dayeon CHO , Hyungock KIM , Sangdo PARK
IPC: H01L27/02 , H01L23/528 , H01L27/092 , H01L29/78 , H01L29/06 , H01L29/423 , H01L29/786 , G06F30/392 , G06F30/398
Abstract: A semiconductor device includes standard cells in a first direction parallel to an upper surface of a substrate and a second direction intersecting the first direction, and filler cells between ones of the standard cells. Each of the standard cells includes an active region, a gate structure that intersects the active region, source/drain regions on the active region on both sides of the gate structure, and interconnection lines. Each of the filler cells includes a filler active region and a filler gate structure that intersects the filler active region. The standard cells include first to third standard cells in first to third rows sequentially in the second direction, respectively. First interconnection lines are arranged with a first pitch, second interconnection lines are arranged with a second pitch, and third interconnection lines are arranged with a third pitch different from the first and second pitches.
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公开(公告)号:US20220005801A1
公开(公告)日:2022-01-06
申请号:US17181672
申请日:2021-02-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: SungOk LEE , Sangdo PARK , Dayeon CHO
IPC: H01L27/02 , H01L27/092 , H01L21/8238
Abstract: An integrated circuit includes a standard cell continuously arranged on a first row and on a second row, the first row and second row extending parallel with each other in a first direction, the first row and the second row adjacent to each other in a second direction crossing the first direction, a first cell separator contacting a first row boundary of the standard cell on the first row and extending in the second direction, and a second cell separator contacting a second row boundary of the standard cell on the second row and extending in the second direction. The first cell separator and the second cell separator are discontinuous on a first row to second row boundary of the first row and the second row.
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公开(公告)号:US20230142050A1
公开(公告)日:2023-05-11
申请号:US17984417
申请日:2022-11-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyeongyu YOU , Jungho DO , Sangdo PARK , Jaewoo SEO , Jisu YU , Minjae JEONG , Dayeon CHO
CPC classification number: H01L27/06 , H01L28/88 , H01L27/0207
Abstract: An integrated circuit including a plurality of stacked metal layers and a method of manufacturing the integrated circuit are provided. The method includes: providing a plurality of standard cells, each of which includes cell patterns respectively formed on the plurality of metal layers; and forming, on a particular metal layer among the plurality of metal layers which includes patterns extending in a first direction that are respectively formed on a plurality of tracks that are spaced apart from each other in a second direction, an additional pattern between adjacent patterns formed on a particular track of the plurality of tracks based on an interval between the adjacent patterns exceeding a reference value.
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