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公开(公告)号：US11894371B2
公开(公告)日：2024-02-06
申请号：US17871077
申请日：2022-07-22
发明人： Dongchan Suh , Dahye Kim
IPC分类号： H01L27/088 , H01L21/8234 , H01L29/78
CPC分类号： H01L27/0886 , H01L21/823412 , H01L21/823431 , H01L29/7851
摘要： Provided is an integrated circuit device including: a plurality of fin-type active regions protruding from a top surface of a substrate and extending in a first horizontal direction; at least one semiconductor layer, each including a lower semiconductor layer and an upper semiconductor layer sequentially stacked on at least one of the plurality of fin-type active regions; and a plurality of gate electrodes extending in a second horizontal direction crossing the first horizontal direction on the plurality of fin-type active regions, wherein the lower semiconductor layer includes a same material as a material of the upper semiconductor layer, and wherein a semiconductor interface is provided between the lower semiconductor layer and the upper semiconductor layer.
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公开(公告)号：US11676963B2
公开(公告)日：2023-06-13
申请号：US17584877
申请日：2022-01-26
发明人： Seungryul Lee , Yongseung Kim , Jungtaek Kim , Pankwi Park , Dongchan Suh , Moonseung Yang , Seojin Jeong , Minhee Choi , Ryong Ha
IPC分类号： H01L27/088 , H01L29/423 , H01L29/78 , H01L21/8234 , H01L29/06
CPC分类号： H01L27/0886 , H01L21/823431 , H01L21/823468 , H01L29/0673 , H01L29/4238 , H01L29/785
摘要： An integrated circuit device includes a fin-type active region protruding from a substrate and extending in a first direction, a plurality of semiconductor patterns disposed apart from an upper surface of the fin-type active region, the plurality of semiconductor patterns each including a channel region; a gate electrode surrounding the plurality of semiconductor patterns, extending in a second direction perpendicular to the first direction, and including a main gate electrode, which is disposed on an uppermost semiconductor pattern of the plurality of semiconductor patterns and extends in the second direction, and a sub-gate electrode disposed between the plurality of semiconductor patterns; a spacer structure disposed on both sidewalls of the main gate electrode; and a source/drain region connected to the plurality of semiconductor patterns, disposed at both sides of the gate electrode, and contacting a bottom surface of the spacer structure.
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公开(公告)号：US11094832B2
公开(公告)日：2021-08-17
申请号：US16744642
申请日：2020-01-16
发明人： Dahye Kim , Dongchan Suh , Jinbum Kim
IPC分类号： H01L29/786 , H01L29/78 , H01L29/423 , H01L29/06 , H01L29/66
摘要： A semiconductor device includes an active region extending on a substrate in a first direction and including an impurity region, a plurality of channel layers vertically spaced apart from each other on the active region, a gate structure extending on the substrate in a second direction to intersect the active region and the plurality of channel layers, and surrounding the plurality of channel layers, a source/drain region disposed on the active region on at least one side of the gate structure and in contact with the plurality of channel layers, a barrier layer including a first barrier layer spaced apart from an upper surface of the active region and being disposed in the active region, and second barrier layers respectively disposed below the plurality of channel layers, and a contact plug connected to the source/drain region.
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公开(公告)号：US11710796B2
公开(公告)日：2023-07-25
申请号：US17396059
申请日：2021-08-06
发明人： Dahye Kim , Dongchan Suh , Jinbum Kim
IPC分类号： H01L29/786 , H01L29/78 , H01L29/423 , H01L29/06 , H01L29/66
CPC分类号： H01L29/78696 , H01L29/0673 , H01L29/4232 , H01L29/42392 , H01L29/66545 , H01L29/7851 , H01L29/7854
摘要： A semiconductor device includes an active region extending on a substrate in a first direction and including an impurity region, a plurality of channel layers vertically spaced apart from each other on the active region, a gate structure extending on the substrate in a second direction to intersect the active region and the plurality of channel layers, and surrounding the plurality of channel layers, a source/drain region disposed on the active region on at least one side of the gate structure and in contact with the plurality of channel layers, a barrier layer including a first barrier layer spaced apart from an upper surface of the active region and being disposed in the active region, and second barrier layers respectively disposed below the plurality of channel layers, and a contact plug connected to the source/drain region.
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公开(公告)号：US11264381B2
公开(公告)日：2022-03-01
申请号：US16841806
申请日：2020-04-07
发明人： Seungryul Lee , Yongseung Kim , Jungtaek Kim , Pankwi Park , Dongchan Suh , Moonseung Yang , Seojin Jeong , Minhee Choi , Ryong Ha
IPC分类号： H01L27/088 , H01L21/8234 , H01L29/423 , H01L29/78 , H01L29/06
摘要： An integrated circuit device includes a fin-type active region protruding from a substrate and extending in a first direction, a plurality of semiconductor patterns disposed apart from an upper surface of the fin-type active region, the plurality of semiconductor patterns each including a channel region; a gate electrode surrounding the plurality of semiconductor patterns, extending in a second direction perpendicular to the first direction, and including a main gate electrode, which is disposed on an uppermost semiconductor pattern of the plurality of semiconductor patterns and extends in the second direction, and a sub-gate electrode disposed between the plurality of semiconductor patterns; a spacer structure disposed on both sidewalls of the main gate electrode; and a source/drain region connected to the plurality of semiconductor patterns, disposed at both sides of the gate electrode, and contacting a bottom surface of the spacer structure.
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公开(公告)号：US11195917B2
公开(公告)日：2021-12-07
申请号：US16743627
申请日：2020-01-15
发明人： Jihye Yi , Unki Kim , Dongchan Suh
IPC分类号： H01L29/10 , H01L29/423 , H01L29/78
摘要： A semiconductor device is described that includes a substrate, an active region protruding from the substrate and extending in a first direction, a plurality of channel layers disposed on the active region and spaced apart from each other in a direction perpendicular to an upper surface of the substrate, an isolation film disposed between a lowermost channel layer of the plurality of channel layers and the active region, a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction, and a source/drain region disposed on at least one side of the gate electrode and connected to each of the plurality of channel layers. The isolation film is disposed on a level higher than a bottom surface of the source/drain region.
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