公开(公告)号：US20220382317A1

公开(公告)日：2022-12-01

申请号：US17737575

申请日：2022-05-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNYOUNG PARK ,  JOOHWAN KIM ,  JINDO BYUN ,  EUNSEOK SHIN ,  HYUNYOON CHO ,  YOUNGDON CHOI ,  JUNGHWAN CHOI

IPC: G06F1/06 ,  H03K3/017 ,  H03K19/20

Abstract: A transmitter circuit that receives parallel signals and outputs a serial signal in response to the parallel signals may include; a clock generator generating first clock signals having different respective phases, a multiplexer including selection circuits respectively configured to selectively provide at least two of the parallel signals to an output node in response to at least two of the first clock signals, and an output driver generating the serial signal by amplifying a signal at the output node.