公开(公告)号：US20200212061A1

公开(公告)日：2020-07-02

申请号：US16663228

申请日：2019-10-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KANGYOON CHOI ,  DONG-SIK LEE ,  JONGWON KIM ,  GILSUNG LEE ,  EUNGSUK CHO ,  BYUNGYONG CHOI ,  SUNG-MIN HWANG

IPC: H01L27/11582 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11565 ,  H01L27/11573 ,  H01L29/04

Abstract: A three-dimensional (3D) semiconductor memory device includes a substrate that includes a cell array region and a connection region, a dummy trench formed on the connection region, an electrode structure on the substrate and that includes vertically stacked electrodes that have a staircase structure on the connection region, a dummy insulating structure disposed in the dummy trench, the dummy insulating structure including an etch stop pattern spaced apart from the substrate and the electrode structure, a cell channel structure disposed on the cell array region and that penetrates the electrode structure and makes contact with the substrate, and a dummy channel structure disposed on the connection region and that penetrates the electrode structure and a portion of the dummy insulating structure and that makes contact with the etch stop pattern.