公开(公告)号：US20240120263A1

公开(公告)日：2024-04-11

申请号：US18367896

申请日：2023-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHEOL KIM ,  HWANYOUNG CHOI ,  SEOKHYUN LEE

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L25/065

CPC classification number: H01L23/49822 ,  H01L23/3142 ,  H01L23/3672 ,  H01L23/373 ,  H01L23/49816 ,  H01L24/08 ,  H01L25/0655 ,  H01L2224/081 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/1438

Abstract: A semiconductor package includes a package substrate, an interposer mounted on the package substrate via first conductive bumps; first and second semiconductor devices on the interposer and spaced apart from each other, mounted on the interposer via second conductive bumps and having concavo-convex patterns respectively formed in upper surfaces thereof; and a sealing member on the interposer covering the first and second semiconductor devices and exposing the concavo-convex patterns. The concavo-convex pattern of the first semiconductor device includes a plurality of first pillar structures provided in the upper surface of a first region of the first semiconductor device and having a first width, and a plurality of second pillar structures provided in the upper surface of a second region of the first semiconductor device and having a second width greater than the first width.