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公开(公告)号:US12107029B2
公开(公告)日:2024-10-01
申请号:US17595230
申请日:2020-07-29
申请人: ROHM CO., LTD.
发明人: Masashi Hayashiguchi
IPC分类号: H01L23/373 , H01L23/00 , H01L23/367 , H01L25/18
CPC分类号: H01L23/373 , H01L23/3672 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/18 , H01L2224/29139 , H01L2224/32225 , H01L2224/48139 , H01L2224/48229 , H01L2224/73265 , H01L2924/10272 , H01L2924/1203 , H01L2924/13091
摘要: A power module includes a substrate that is electrically insulative and includes a substrate main surface and a substrate back surface at opposite sides in a thickness direction. The power module also includes a mounting layer that is conductive and arranged on the substrate main surface. The power module further includes a graphite plate having anisotropic thermal conductivity and including a plate main surface and a plate back surface at opposite sides in the thickness direction. The plate back surface is connected to the mounting layer. The power module further includes a power semiconductor element arranged on the plate main surface.
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公开(公告)号:US12103406B2
公开(公告)日:2024-10-01
申请号:US18161974
申请日:2023-01-31
IPC分类号: B60L50/51 , B60L3/00 , B60L15/00 , B60L15/08 , B60L50/40 , B60L50/60 , B60L50/64 , B60L53/20 , B60L53/22 , B60L53/62 , B60R16/02 , G01R15/20 , G06F1/08 , G06F13/40 , H01L21/48 , H01L23/00 , H01L23/15 , H01L23/367 , H01L23/373 , H01L23/40 , H01L23/467 , H01L23/473 , H01L23/495 , H01L23/538 , H01L25/00 , H01L25/07 , H01L29/66 , H02J7/00 , H02M1/00 , H02M1/08 , H02M1/084 , H02M1/088 , H02M1/12 , H02M1/32 , H02M1/42 , H02M1/44 , H02M3/335 , H02M7/00 , H02M7/537 , H02M7/5387 , H02M7/5395 , H02P27/06 , H02P27/08 , H02P29/024 , H02P29/68 , H05K1/14 , H05K1/18 , H05K5/02 , H05K7/20 , B60L15/20 , H03K19/20
CPC分类号: B60L50/60 , B60L3/003 , B60L15/007 , B60L15/08 , B60L50/40 , B60L50/51 , B60L50/64 , B60L53/20 , B60L53/22 , B60L53/62 , B60R16/02 , G01R15/20 , G06F1/08 , G06F13/4004 , H01L21/4882 , H01L23/15 , H01L23/3672 , H01L23/3675 , H01L23/3735 , H01L23/4006 , H01L23/467 , H01L23/473 , H01L23/49562 , H01L23/5383 , H01L24/32 , H01L24/33 , H01L25/072 , H01L25/50 , H01L29/66553 , H02J7/0063 , H02M1/0009 , H02M1/0054 , H02M1/08 , H02M1/084 , H02M1/088 , H02M1/123 , H02M1/32 , H02M1/322 , H02M1/327 , H02M1/4258 , H02M1/44 , H02M3/33523 , H02M7/003 , H02M7/537 , H02M7/5387 , H02M7/53871 , H02M7/53875 , H02M7/5395 , H02P27/06 , H02P27/08 , H02P27/085 , H02P29/024 , H02P29/027 , H02P29/68 , H05K1/145 , H05K1/181 , H05K1/182 , H05K5/0247 , H05K7/20154 , H05K7/2049 , H05K7/20854 , H05K7/209 , H05K7/20927 , B60L15/20 , B60L2210/30 , B60L2210/40 , B60L2210/42 , B60L2210/44 , B60L2240/36 , G06F2213/40 , H01L2023/405 , H01L2023/4087 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H02J2207/20 , H02P2207/05 , H03K19/20 , H05K2201/042 , H05K2201/10166
摘要: A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a first power module including: a first connection; a second connection; a first power switch including a first gate terminal, the first power switch configured to control a first flow of current between the first connection and the second connection based on a first signal to the first gate terminal; and a first point-of-use controller configured to provide the first signal to the first gate terminal to control the first power switch.
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公开(公告)号:US12100701B1
公开(公告)日:2024-09-24
申请号:US18142410
申请日:2023-05-02
申请人: Psiquantum, Corp.
IPC分类号: H01L31/0232 , G02B6/36 , H01L21/48 , H01L23/00 , H01L23/367 , H01L23/48 , H01L23/498 , H01L25/16
CPC分类号: H01L25/167 , G02B6/3636 , H01L21/4853 , H01L21/486 , H01L21/4882 , H01L23/3672 , H01L23/481 , H01L23/49827 , H01L24/08 , H01L24/48 , H01L24/80 , H01L24/85 , H01L2224/08145 , H01L2224/48157 , H01L2224/80895 , H01L2224/80896 , H01L2924/12043 , H01L2924/1431 , H01L2924/1903 , H01L2924/19041 , H01L2924/19107
摘要: Techniques disclosed herein relate generally to integrating photonic integrated circuits and electronic integrated circuits in a same package. A device includes a semiconductor substrate and a die stack on the semiconductor substrate. The die stack includes a photonic integrated circuit (PIC) die and an electronic integrated circuit (EIC) die. The PIC die includes a PIC substrate and a photonic integrated circuit formed on the PIC substrate. The EIC die includes an EIC substrate and an electronic integrated circuit formed on the EIC substrate. The EIC die and the PIC die are bonded such that the PIC substrate and the EIC substrate are disposed on opposing sides of the die stack. The PIC substrate is bonded to the semiconductor substrate. The device also includes a cooling plate bonded to the EIC substrate.
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公开(公告)号:US12074080B2
公开(公告)日:2024-08-27
申请号:US18107968
申请日:2023-02-09
发明人: Maksim Kuzmenka
IPC分类号: H01L23/367 , B21D53/02 , H01L23/373
CPC分类号: H01L23/3672 , H01L23/3675 , B21D53/022 , F28F2255/04 , H01L23/3736
摘要: Systems for cooling semiconductor devices that can comprise a heatsink and a cleaning element for the heatsink. The heatsink can have fins spaced apart from each other by channels. The cleaning element can have a base and one or more arms extending from the base. The cleaning element can be positioned with respect to the heatsink such that each arm is aligned with a corresponding channel between the fins, and the arms are moveable between a flow configuration in which the arms are in the channels and a cleaning configuration in which the arms are outside of the channels.
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公开(公告)号:US20240282663A1
公开(公告)日:2024-08-22
申请号:US18635186
申请日:2024-04-15
发明人: Seungwon IM , Dongwook KANG , Oseob JEON
IPC分类号: H01L23/373 , H01L23/31 , H01L23/367 , H01L23/473 , H01L25/07
CPC分类号: H01L23/3735 , H01L23/3107 , H01L23/3672 , H01L23/473 , H01L25/072
摘要: In a general aspect, an electronic device assembly can include a semiconductor device assembly including a ceramic substrate; a patterned metal layer disposed on a first surface of the ceramic substrate; and a semiconductor die disposed on the patterned metal layer. The electronic device assembly can also include a thermal dissipation appliance. Ceramic material of a second surface of the ceramic substrate can be direct-bonded to a surface of the thermal dissipation appliance. The second surface of the ceramic substrate can be opposite the first surface of the ceramic substrate.
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公开(公告)号:US20240282662A1
公开(公告)日:2024-08-22
申请号:US18374410
申请日:2023-09-28
申请人: UT-Battelle, LLC
IPC分类号: H01L23/373 , H01L23/00 , H01L23/367 , H01L25/07
CPC分类号: H01L23/3735 , H01L23/3672 , H01L24/32 , H01L24/33 , H01L25/072 , H01L2224/32265 , H01L2224/33505 , H01L2924/1517 , H01L2924/15747
摘要: A multilayer substrate for a power module is provided. The multilayer substrate may include a copper tile soldered between an integrated circuit component and a direct bonded copper assembly in order to facilitate heat dissipation from the integrated circuit component.
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公开(公告)号:US12051662B2
公开(公告)日:2024-07-30
申请号:US17644957
申请日:2021-12-17
申请人: ROHM CO., LTD.
发明人: Masatoshi Aketa
IPC分类号: H01L23/00 , H01L23/14 , H01L23/15 , H01L23/31 , H01L23/367 , H01L23/498 , H01L23/538 , H01L25/18 , H01L21/56
CPC分类号: H01L24/06 , H01L23/147 , H01L23/15 , H01L23/3121 , H01L23/3672 , H01L23/49838 , H01L23/49894 , H01L23/5386 , H01L24/13 , H01L24/32 , H01L25/18 , H01L21/561 , H01L24/11 , H01L24/29 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2224/0401 , H01L2224/04026 , H01L2224/06181 , H01L2224/11462 , H01L2224/1162 , H01L2224/1184 , H01L2224/13016 , H01L2224/13022 , H01L2224/13147 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/32227 , H01L2224/73253 , H01L2224/83801 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/13055 , H01L2924/13091
摘要: An electronic component includes a substrate having a first main surface on one side and a second main surface on the other side, a chip having a first chip main surface on one side and a second chip main surface on the other side, and a plurality of electrodes formed on the first chip main surface and/or the second chip main surface, the chip being arranged on the first main surface of the substrate, a sealing insulation layer that seals the chip on the first main surface of the substrate such that the second main surface of the substrate is exposed, the sealing insulation layer having a sealing main surface that opposes the first main surface of the substrate, and a plurality of external terminals formed to penetrate through the sealing insulation layer so as to be exposed from the sealing main surface of the sealing insulation layer, the external terminals being respectively electrically connected to the plurality of electrodes of the chip.
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公开(公告)号:US12046529B2
公开(公告)日:2024-07-23
申请号:US18388873
申请日:2023-11-13
发明人: Jeffrey J. Ronning
IPC分类号: H01L23/367 , H01L23/36 , H01L25/065
CPC分类号: H01L23/3672 , H01L23/36 , H01L25/0652 , H01L2225/06562 , H01L2225/06568
摘要: An array of heat-sinked power semiconductors that includes a power semiconductor and a heat sink. The power semiconductor has a power semiconductor die, a plurality of first terminals and a second terminal. The power semiconductor die has a plurality of semiconductor terminals. Each of the first terminals is electrically coupled to an associated one of the semiconductor terminals. The second terminal is a surface mount terminal and is electrically coupled to one of the first terminals. The heat sink has a heat sink body and a plurality of fins. The heat sink body has a base and an exterior surface. The base is fixedly coupled directly to the surface mount terminal. The exterior surface has a fin mount portion to which the fins extend. At least a portion of the fin-mount portion is oriented non-parallel to base.
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公开(公告)号:US20240213221A1
公开(公告)日:2024-06-27
申请号:US18400219
申请日:2023-12-29
IPC分类号: H01L25/065 , H01L23/367 , H01L23/46
CPC分类号: H01L25/0657 , H01L23/3672 , H01L23/46 , H01L2225/06513 , H01L2225/06517 , H01L2225/06589
摘要: A 3D integrated circuit device can include a substrate, a thermal interface layer and at least one die, at least one device layer bonded between the thermal interface layer and the at least one die, wherein the thermal interface layer enhances conductive heat transfer between the at least one device layer and the at least one die, and a heat sink located adjacent to a heat spreader, wherein the thermal interface layer, the at least one die and the at least one device layer are located between the heat spreader and the substrate.
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公开(公告)号:US20240186211A1
公开(公告)日:2024-06-06
申请号:US18441484
申请日:2024-02-14
发明人: Jooyang EOM , Inpil YOO , Seungwon IM , Byoungok LEE
IPC分类号: H01L23/367 , H01L21/48
CPC分类号: H01L23/3672 , H01L21/4882
摘要: In a general aspect, an apparatus includes a substrate and a metal layer disposed on a surface of the substrate. The apparatus also includes a first recess and a second recess formed in the metal layer, and a folded cooling fin. A first portion of the folded cooling fin is disposed within the first recess and coupled with the metal layer, and a second portion of the folded cooling fin is disposed in the second recess and coupled with the metal layer.
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