公开(公告)号：US20190146688A1

公开(公告)日：2019-05-16

申请号：US16120832

申请日：2018-09-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hee-Tai OH ,  Walter Jun

IPC: G06F3/06

Abstract: A memory device includes a nonvolatile memory having a first block and a memory controller configured to exchange data with the nonvolatile memory. The memory controller includes a first processor to divide the first block into first and second domains, a second processor to generate a reclaim signal by determining whether to perform reclaiming on each of the first and second domains and a third processor performer which reclaims each of the first and second domains according to the reclaim signal and merges the first and second domains.

公开(公告)号：US20240176700A1

公开(公告)日：2024-05-30

申请号：US18512613

申请日：2023-11-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngjoo SEO ,  Youngdeok SEO ,  Sangkwon MOON ,  Hyunkyo OH ,  Hee-Tai OH ,  Heewon LEE ,  Jisoo KIM

IPC: G06F11/10 ,  G06F11/07

CPC classification number: G06F11/1068 ,  G06F11/076

Abstract: An operation method of a storage controller, which is configured to control a nonvolatile memory device, includes initiating a first instance of a respective reliability operation for a respective memory block included in the nonvolatile memory device, the respective reliability operation including detecting a degradation level of the respective memory block and setting a respective skip reference value based on the detected degradation level; determining whether a respective number of consecutively skipped instances of the respective reliability operation is less than the respective skip reference value; and selectively skipping or performing a next instance of the respective reliability operation based on the determination result.

公开(公告)号：US20200233739A1

公开(公告)日：2020-07-23

申请号：US16558866

申请日：2019-09-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hee-Tai OH

IPC: G06F11/07 ,  G06F12/1009 ,  G06F3/06

Abstract: A memory system includes a non-volatile memory device and controller circuitry. The non-volatile memory device includes an array of memory cells that includes memory blocks and pages. Each separate memory block includes a separate, respective set of one or more pages. The controller circuitry is configured to control an operation of the non-volatile memory device. The controller circuitry includes processing circuitry configured to perform a recovery operation for the non-volatile memory device in response to a determination that a specific event has occurred at the memory system during a program operation of the non-volatile memory device. The recovery operation includes determining status information associated with a first group including at least one page, determining a quantity of a set of pages included in a second group based on the status information, and programming dummy data for one or more pages of the set of pages included in the second group.