公开(公告)号：US20240237347A1

公开(公告)日：2024-07-11

申请号：US18380422

申请日：2023-10-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongmin KIM ,  Seongsoo MOON ,  SEUNGHAK PARK ,  Junseok PARK ,  KI-BONG SEO ,  Howon SEO ,  Mingyoo CHOI

IPC: H10B43/27 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

CPC classification number: H10B43/27 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

Abstract: A method of fabricating a semiconductor device including: alternately stacking first interlayer insulating layers and first sacrificial layers on a substrate to form a first mold structure; forming a dummy hole penetrating the first mold structure; forming a dummy sacrificial pillar in the dummy hole, wherein the formation of the dummy sacrificial pillar includes forming a first recessed key region to expose a portion of an inner side surface of the dummy hole; and forming a second mold structure with a substantially uniform thickness on the first recessed key region and the first mold structure, wherein a top surface of the second mold structure has a second recessed key region corresponding to the first recessed key region.