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公开(公告)号:US20240038319A1
公开(公告)日:2024-02-01
申请号:US18222563
申请日:2023-07-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: NAMHYUNG KIM , DAEJEONG KIM , DOHAN KIM , DEOKHO SEO , JAEIN SONG , INSU CHOI
CPC classification number: G11C29/44 , G11C29/1201 , G11C29/027
Abstract: A memory system including a memory device that receives a plurality of signals including a post package repair (PPR) command from a host, wherein the memory device includes a memory cell array including a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a plurality of redundancy memory cells connected to one or more redundancy word lines and the plurality of bit lines, and anti-fuse memory cells, and a PPR control circuit that transmits to the host whether a PPR operation on a defective memory cell of the memory cell array has passed.