公开(公告)号：US20170099151A1

公开(公告)日：2017-04-06

申请号：US15212343

申请日：2016-07-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KITAK KIM ,  JI-SU KANG ,  KISEOK BAE ,  JONGHOON SHIN ,  KYOUNGMOON AHN ,  JINSU HYUN

IPC: H04L9/32 ,  H04L9/06 ,  H04W12/04 ,  H04W12/06 ,  H04L9/14 ,  H04L9/30 ,  H04L29/06

CPC classification number: H04L9/3263 ,  H04L9/0643 ,  H04L9/14 ,  H04L9/30 ,  H04L9/3234 ,  H04L9/3271 ,  H04L63/0823 ,  H04L2209/80 ,  H04W12/06

Abstract: An authentication apparatus, included in a device supporting a network communication, includes a certificate handler that receives a certificate of an opponent and parses or verifies the certificate of the opponent. Cryptographic primitives receive an authentication request of the opponent, generate a random number in response to the authentication request, generate a challenge corresponding to the random number, and verify a response of the opponent corresponding to the challenge. A shared memory stores the parsed certificate, the random number, the challenge, and the response. An authentication controller controls the certificate handler, the cryptographic primitives, and the shared memory through a register setting, according to an authentication protocol.

公开(公告)号：US20150277855A1

公开(公告)日：2015-10-01

申请号：US14672656

申请日：2015-03-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JONGHOON SHIN ,  SUN-SOO SHIN ,  KYOUNGMOON AHN ,  YONG KI LEE

IPC: G06F7/523

CPC classification number: G06F7/728 ,  G06F7/5338

Abstract: A Montgomery multiplier includes a partial product computing unit for multiplying a multiplicand and a multiplier; a modulus reduction computing unit for performing a multiplication of a modulus and a quotient that reflects a quotient sign; an accumulation unit for accumulating in a intermediate value an output value of the partial product computing unit and an output value of the modulus reduction computing unit from a previous cycle; a quotient computing unit for receiving an accumulation value of the accumulation unit during a current cycle and calculating a quotient sign to be used during a next cycle; and a quotient sign determination unit for determining a quotient sign to be used during a next cycle from the multiplicand, the multiplier and the quotient.

Abstract translation: 蒙哥马利乘数包括用于乘以被乘数和乘数的部分积计算单元; 模数减少计算单元，用于执行反映商标的模数和商的乘法; 累积单元，用于在中间值中积累所述部分积计算单元的输出值和所述模数减少计算单元的输出值与前一周期; 商计算单元，用于在当前周期期间接收累积单元的累加值，并计算在下一周期期间使用的商标; 以及商符号确定单元，用于确定在被乘数的下一周期期间要使用的商符号，乘数和商。

公开(公告)号：US20160357515A1

公开(公告)日：2016-12-08

申请号：US15242768

申请日：2016-08-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YONG KI LEE ,  JONGHOON SHIN ,  KyoungMoon AHN ,  Ji-Su KANG ,  Sun-Soo SHIN

IPC: G06F7/72

CPC classification number: G06F7/722 ,  G06F7/728

Abstract: A modular multiplier and a modular multiplication method are provided. The modular multiplier includes: a first register which stores a previous accumulation value calculated at a previous cycle; a second register which stores a previous quotient calculated at the previous cycle; a quotient generator which generates a quotient using the stored previous accumulation value output from the first register; and an accumulator which receives an operand, a bit value of a multiplier, the stored previous accumulation value, and the stored previous quotient to calculate an accumulation value in a current cycle, wherein the calculated accumulation value is updated to the first register, and the generated quotient is updated to the second register.