公开(公告)号：US20200090729A1

公开(公告)日：2020-03-19

申请号：US16367385

申请日：2019-03-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JONGPIL SON ,  Wooyeong Cho

IPC: G11C11/4076 ,  G11C11/406 ,  G11C11/408 ,  G06F3/06

Abstract: A memory module includes a plurality of memory devices each including a memory cell array, and a register clock driver connected to the memory devices. The register clock driver detects a row hammer address among row addresses corresponding to word lines of the memory cell array, converts a refresh command, among a plurality of refresh commands received from a memory controller for refreshing the memory cell array, to a row hammer refresh command, and transmits the row hammer refresh command and the row hammer address to each of the memory devices.

公开(公告)号：US20240029777A1

公开(公告)日：2024-01-25

申请号：US18076932

申请日：2022-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JONGPIL SON

IPC: G11C11/406 ,  G11C11/4093

CPC classification number: G11C11/40615 ,  G11C11/40618 ,  G11C11/4093

Abstract: A memory device is provided. The memory device includes: a first memory cell array including a first row and a second row; and a self-refresh circuit configured to control refresh in response to a first self-refresh entry signal, and stop refresh of the second row after refreshing the first row in response to a self-refresh exit signal.