公开(公告)号：US11696436B2

公开(公告)日：2023-07-04

申请号：US17035082

申请日：2020-09-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki Seok Lee ,  Jae Hyun Yoon ,  Kyu Jin Kim ,  Keun Nam Kim ,  Hui-Jung Kim ,  Kyu Hyun Lee ,  Sang-Il Han ,  Sung Hee Han ,  Yoo Sang Hwang

IPC: H10B12/00

CPC classification number: H10B12/34 ,  H10B12/053

Abstract: A includes an element isolation region, a first active region bounded by the element isolation region and that extends in a first direction and includes first and second parts disposed at a first level, and a third part disposed at a second level located above the first level, and a gate electrode disposed inside each of the element isolation region and the first active region and that extends in a second direction different from the first direction. The second part is spaced apart in the first direction from the first part, and the third part contacts each of the first and second parts. A first width in the second direction of the first part is less than a second width in the second direction of the third part.

公开(公告)号：US11688779B2

公开(公告)日：2023-06-27

申请号：US17387427

申请日：2021-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hui-Jung Kim ,  Junhyeok Ahn ,  Jae Hyun Yoon ,  Myeong-Dong Lee ,  Seok Hwan Lee ,  Sunghee Han ,  Inkyoung Heo

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/45 ,  H01L27/108

CPC classification number: H01L29/41775 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1606 ,  H01L27/10814 ,  H01L29/45

Abstract: A semiconductor memory device includes a substrate having a first active pattern including first and second source/drain regions, a gate electrode intersecting the first active pattern and disposed between the first and second source/drain regions, a bit line intersecting the first active pattern and electrically connected to the first source/drain region, a spacer disposed on a sidewall of the bit line, a contact electrically connected to the second source/drain region and spaced apart from the bit line with the spacer interposed therebetween, an interface layer disposed between the second source/drain region and the contact, and forming an ohmic contact between the second source/drain region and the contact, and a data storage element disposed on the contact. A bottom of the contact is lower than a top surface of the substrate. The contact is formed of a metal, a conductive metal nitride, and/or a combination thereof.