公开(公告)号：US20200152580A1

公开(公告)日：2020-05-14

申请号：US16403968

申请日：2019-05-06

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Woon Chun KIM ,  Jun Heyoung PARK ,  Ji Hye SHIM ,  Sung Keun PARK ,  Gun LEE

IPC分类号： H01L23/552 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00

摘要： A semiconductor package includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and electrically connected to the one or more redistribution layers, an encapsulant disposed on the connection structure and covering at least a portion of the semiconductor chip, and a shielding structure covering at least a portion of the encapsulant. The shielding structure includes a conductive pattern layer having a plurality of openings, a first metal layer covering the conductive pattern layer and extending across the plurality of openings, and a second metal layer covering the first metal layer. The second metal layer has a thickness greater than a thickness of the first metal layer.

公开(公告)号：US20200014090A1

公开(公告)日：2020-01-09

申请号：US16287056

申请日：2019-02-27

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Hyung Mi JUNG ,  Seong Hyun YOO ,  Ji Hye SHIM ,  Ki Seok KIM

IPC分类号： H01Q1/22 ,  H01Q1/24 ,  H01L23/66 ,  G06K19/077

摘要： An antenna module includes: a base substrate including a rigid region and a flexible region; an antenna member disposed on one surface of the rigid region of the base substrate and including antenna patterns; and a semiconductor package disposed on the other surface of the rigid region of the base substrate and including one or more semiconductor chips.

公开(公告)号：US20210358838A1

公开(公告)日：2021-11-18

申请号：US17390109

申请日：2021-07-30

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： So Yeon MOON ,  Ji Hye SHIM ,  Seung Hun CHAE

IPC分类号： H01L23/498 ,  H01L23/48 ,  H01L23/31

摘要： A semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and a first encapsulant covering at least a portion of each of the inactive surface and a side surface of the semiconductor chip. A metal layer is disposed on the first encapsulant, and includes a first conductive layer and a second conductive layer, sequentially stacked. A connection structure is disposed on the active surface of the semiconductor chip, and includes a first redistribution layer electrically connected to the connection pad. A lower surface of the first conductive layer is in contact with the first encapsulant and has first surface roughness, and an upper surface of the first conductive layer is in contact with the second conductive layer and has second surface roughness smaller than the first surface roughness.