公开(公告)号：US20200152580A1

公开(公告)日：2020-05-14

申请号：US16403968

申请日：2019-05-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woon Chun KIM ,  Jun Heyoung PARK ,  Ji Hye SHIM ,  Sung Keun PARK ,  Gun LEE

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00

Abstract: A semiconductor package includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and electrically connected to the one or more redistribution layers, an encapsulant disposed on the connection structure and covering at least a portion of the semiconductor chip, and a shielding structure covering at least a portion of the encapsulant. The shielding structure includes a conductive pattern layer having a plurality of openings, a first metal layer covering the conductive pattern layer and extending across the plurality of openings, and a second metal layer covering the first metal layer. The second metal layer has a thickness greater than a thickness of the first metal layer.

公开(公告)号：US20230083493A1

公开(公告)日：2023-03-16

申请号：US17741581

申请日：2022-05-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungwan SHIN ,  Junghoon KANG ,  Gun LEE

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/29 ,  H01L23/532

Abstract: A semiconductor package includes: a lower redistribution structure including a lower insulating layer and a lower redistribution layer; a semiconductor chip disposed on the lower redistribution structure; connection conductors connected to the lower redistribution layer; an encapsulant disposed on the connection conductors; and an upper redistribution structure including an upper insulating layer and upper redistribution layers, wherein the upper insulating layer is disposed on the encapsulant, wherein the upper redistribution layers are disposed on the upper insulating layer, wherein the connection conductors and the encapsulant form a first step, wherein the upper redistribution layers include first and second upper redistribution layers, wherein the first upper redistribution layer does not overlap the connection conductors, wherein the second upper redistribution layer overlaps the connection conductors, wherein the first and second upper redistribution layers form a second step with a height substantially equal to or smaller than that of the first step.

公开(公告)号：US20240145326A1

公开(公告)日：2024-05-02

申请号：US18323680

申请日：2023-05-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungchul OH ,  Junwoo MYUNG ,  Jangbae SON ,  Gun LEE

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/3128 ,  H01L21/568 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16227

Abstract: A method of manufacturing a semiconductor package includes adding an insulating frame to a surface of a carrier substrate, wherein the insulating frame covers a side surface of a first metal layer on the surface of the carrier substrate and bringing a cover insulating layer into contact with the insulating frame and the first metal layer, wherein the cover insulating layer covers at least one semiconductor chip.

公开(公告)号：US20240079284A1

公开(公告)日：2024-03-07

申请号：US18140417

申请日：2023-04-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Woo MYUNG ,  Gun LEE

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10

CPC classification number: H01L23/3128 ,  H01L21/565 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06541 ,  H01L2225/1058

Abstract: A semiconductor package including a first redistribution structure including a first redistribution layer disposed therein, a first semiconductor chip disposed on the first redistribution structure, an insulating layer surrounding a sidewall of the first semiconductor chip, the insulating layer spaced apart from the first semiconductor chip in a horizontal direction, a first connection structure extending through the insulating layer in a vertical direction, connected to the first redistribution structure, and includes a first via disposed inside the insulating layer. A second connection structure disposed between the first semiconductor chip and the first connection structure, extends through the insulating layer in the vertical direction, connected to the first redistribution structure, and includes a second via disposed inside the insulating layer. A molding layer covering the first semiconductor chip, a sidewall and an upper surface of the insulating layer. At least a portion of the molding layer disposed between the first and second vias.

公开(公告)号：US20240047327A1

公开(公告)日：2024-02-08

申请号：US18309070

申请日：2023-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gun LEE ,  Jun Woo MYUNG

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L23/3107 ,  H01L24/20 ,  H01L2224/221 ,  H01L2224/19 ,  H01L24/19

Abstract: Provided is a semiconductor package. The semiconductor package may include a first redistribution structure, a first semiconductor chip including a first surface and a second surface, the first surface being disposed to face the first redistribution structure, a second redistribution structure disposed on the second surface of the first semiconductor chip and including a second insulating layer and a second redistribution layer, a first sealing layer disposed between the first and second redistribution structures and configured to cover the second surface of the first semiconductor chip, and a connection structure configured to connect the first and the second redistribution structures, wherein the second redistribution layer includes a first via and a second via on the first via, wherein the first via includes first and second seed layers, and a conductive layer on the second seed layer, and wherein the first sealing layer includes a photosensitive insulating material.