公开(公告)号：US11616039B2

公开(公告)日：2023-03-28

申请号：US17220299

申请日：2021-04-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Sick Park ,  Un-Byoung Kang ,  Seon Gyo Kim ,  Joon Ho Jun

IPC: H01L23/48 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00

Abstract: A semiconductor package including a first stack; a plurality of TSVs passing through the first stack; a second stack on the first stack and including a second surface facing a first surface of the first stack; a first pad on the first stack and in contact with the TSVs; a second pad on the second stack; a bump connecting the first and second pads; a first redundancy pad on the first surface of the first stack, spaced apart from the first pad, and not in contact with the TSVs; a second redundancy pad on the second surface of the second stack and spaced apart from the second pad; and a redundancy bump connecting the first redundancy pad and the second redundancy pad, wherein the first pad and first redundancy pad are electrically connected to each other, and the second pad and second redundancy pad are electrically connected to each other.

公开(公告)号：US11948903B2

公开(公告)日：2024-04-02

申请号：US18119397

申请日：2023-03-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Sick Park ,  Un-Byoung Kang ,  Seon Gyo Kim ,  Joon Ho Jun

IPC: H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L24/17 ,  H01L23/481 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/05 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0233 ,  H01L2224/02372 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/05078 ,  H01L2224/05562 ,  H01L2224/06158 ,  H01L2224/06182 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/14152 ,  H01L2224/1416 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/17107 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06544

Abstract: A semiconductor package including a first stack; a plurality of TSVs passing through the first stack; a second stack on the first stack and including a second surface facing a first surface of the first stack; a first pad on the first stack and in contact with the TSVs; a second pad on the second stack; a bump connecting the first and second pads; a first redundancy pad on the first surface of the first stack, spaced apart from the first pad, and not in contact with the TSVs; a second redundancy pad on the second surface of the second stack and spaced apart from the second pad; and a redundancy bump connecting the first redundancy pad and the second redundancy pad, wherein the first pad and first redundancy pad are electrically connected to each other, and the second pad and second redundancy pad are electrically connected to each other.