公开(公告)号：US20140062995A1

公开(公告)日：2014-03-06

申请号：US14015166

申请日：2013-08-30

Applicant: Samsung Electronics Co., Ltd

Inventor： Yang Wook KIM ,  Suk Yun WOO ,  Jun Ho SONG ,  Seong Jong YOO ,  Dong Min LEE ,  Kyung Gyu PARK ,  Hyung Woo YU

IPC: G09G3/36

CPC classification number: G09G3/3674 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/0294 ,  G09G2310/0297

Abstract: A method of muxing data by using clock signals having different timings and an apparatus performing the method are provided. Storing and muxing (or dividing) the data are simultaneously performed. The apparatus includes a first latch circuit arranging data blocks, which are input in series, in parallel in response to non-overlapping latch control signals and a second latch circuit latching the data blocks arranged in parallel simultaneously in response to a clock signal.

Abstract translation: 提供了一种通过使用具有不同定时的时钟信号和执行该方法的装置对数据进行多路复用的方法。 同时执行数据的存储和复用（或分割）。 该装置包括：第一锁存电路，其响应于不重叠的锁存控制信号并行输入串行输入的数据块;以及第二锁存电路，其响应于时钟信号同时锁存并行排列的数据块。

公开(公告)号：US20250006636A1

公开(公告)日：2025-01-02

申请号：US18651142

申请日：2024-04-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gwang Guk AN ,  Jun Ho SONG ,  Zhe WU ,  So Yeon CHOI

IPC: H01L23/528 ,  H10B63/00 ,  H10N70/00

Abstract: A semiconductor memory device comprising: a substrate extending in a first direction and a second direction; first conductive lines extending in the first direction on the substrate; first insulating structures that are alternately arranged with the first conductive lines in the second direction, wherein the first insulating structures extend in a third direction intersecting the first direction and the second direction; first information storage films on the first conductive lines and the first insulating structures; and second conductive lines extending in the second direction on the first information storage films, wherein the first information storage films include first regions that overlap the first conductive lines in the third direction and second regions that overlap the first insulating structures in the third direction, and a first height of upper surfaces of the first regions is different from a second height of upper surfaces of the second regions.

公开(公告)号：US20130334985A1

公开(公告)日：2013-12-19

申请号：US13800077

申请日：2013-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyung Tae KIM ,  Soo Ik CHA ,  Jun Ho SONG ,  Jin Chul CHOI ,  Chul Ho CHOI

IPC: H03F3/45 ,  G09G3/22

CPC classification number: H03F3/45179 ,  G09G3/22 ,  G09G3/3688 ,  G09G2310/0291 ,  H03F3/3022 ,  H03F3/45475 ,  H03F2203/45248 ,  H03F2203/45528

Abstract: An output buffer circuit includes an amplifier and a transmission circuit. The amplifier includes a plurality of inputs and an output. The inputs provide first input signals and second input signals to the amplifier. The output provides an output signal as a first input signal of the first input signals to the amplifier. The transmission circuit has an input coupled to the output of the amplifier and further has an output that provides a transmission circuit output signal as a second input signal of the second input signals to the amplifier.

Abstract translation: 输出缓冲电路包括放大器和发送电路。 放大器包括多个输入和输出。 输入端为放大器提供第一输入信号和第二输入信号。 该输出提供输出信号作为到放大器的第一输入信号的第一输入信号。 发送电路具有耦合到放大器的输出端的输入端，并且还具有输出，该输出端将作为第二输入信号的第二输入信号的发送电路输出信号提供给放大器。