公开(公告)号：US20250062186A1

公开(公告)日：2025-02-20

申请号：US18636447

申请日：2024-04-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghoo Yun

IPC: H01L23/42 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498 ,  H01L23/538 ,  H01L23/64 ,  H01L25/10

Abstract: A semiconductor package is provided. The semiconductor package includes a lower redistribution structure, a semiconductor chip on a top surface of the lower redistribution structure, a plurality of conductive posts on a top surface of the lower redistribution structure and spaced apart from the semiconductor chip in a direction parallel to the top surface of the lower redistribution structure, a plurality of capacitors arranged on the top surface of the lower redistribution structure, the plurality of capacitors being between the semiconductor chip and the plurality of conductive posts, and a plurality of thermal interface material layers between the semiconductor chip and the plurality of capacitors.

公开(公告)号：US20250079377A1

公开(公告)日：2025-03-06

申请号：US18664590

申请日：2024-05-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghoo Yun

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/065

Abstract: A semiconductor package includes a first substrate, a lower semiconductor chip on the first substrate, a conductive post disposed on the first substrate, and including at least a portion laterally spaced apart from the lower semiconductor chip, an upper semiconductor chip on the lower semiconductor chip and the conductive post, and a plurality of first bumps disposed between the conductive post and the upper semiconductor chip, wherein each of the plurality of first bumps includes a first pillar pattern and a first solder pattern disposed on the first pillar pattern.

公开(公告)号：US20240145418A1

公开(公告)日：2024-05-02

申请号：US18385611

申请日：2023-10-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghoo Yun ,  Jaemoon Lim

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L23/49822 ,  H01L24/11 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/11462 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13184 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14132 ,  H01L2224/16227 ,  H01L2224/17517 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/0665

Abstract: A semiconductor package includes a redistribution structure, a semiconductor chip on the redistribution structure, a conductive filler between the redistribution structure and the semiconductor chip and connecting the redistribution structure to the semiconductor chip, and a support post between the redistribution structure and the semiconductor chip, the support post being spaced apart from the conductive filler, where the support post includes a first post on a top surface of the redistribution structure, and a second post including a first end connected to the first post and a second end oriented toward the semiconductor chip and supporting the semiconductor chip.