公开(公告)号：US20160133312A1

公开(公告)日：2016-05-12

申请号：US14790451

申请日：2015-07-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HAE-SUK LEE ,  KYO-MIN SOHN ,  HO-YOUNG SONG ,  SANG-HOON SHIN ,  HAN-VIT JUNG

IPC: G11C11/4093 ,  G11C11/4096 ,  H01L25/065 ,  G11C11/4094

CPC classification number: H01L25/0657 ,  G11C7/1066 ,  G11C7/1069 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A memory device including a stack semiconductor device including; an upper substrate vertically stacked on a lower substrate, the upper substrate including N upper through-silicon vias (UTSV) and upper driving circuits, and the lower substrate including N lower through-silicon vias (LTSV) and lower driving circuits, wherein each one of the upper driving circuits is stagger-connected between a Kth UTSV and a (K+1)th LTSV, where ‘N’ is a natural number greater than 1, and ‘K’ is a natural number ranging from 1 to (N−1).

Abstract translation: 一种包括堆叠半导体器件的存储器件，包括： 垂直堆叠在下基板上的上基板，上基板包括N个上穿通硅通孔（UTSV）和上驱动电路，下基板包括N个下穿通硅通孔（LTSV）和下驱动电路，其中每个 的上驱动电路在第K个UTSV和第（K + 1）个LTSV之间错开连接，其中'N'是大于1的自然数，'K'是从1到（N- 1）。

公开(公告)号：US20170162545A1

公开(公告)日：2017-06-08

申请号：US15334667

申请日：2016-10-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MIN-SANG PARK ,  KYO-MIN SOHN

IPC: H01L25/065 ,  H01L23/367 ,  H01L25/00 ,  H01L25/18 ,  H01L23/00

Abstract: A stacked semiconductor device includes a plurality of semiconductor dies and a plurality of thermal-mechanical bumps. The semiconductor dies are stacked in a vertical direction. The thermal-mechanical bumps are disposed in bump layers between the semiconductor dies. Fewer thermal-mechanical bumps are disposed at a location near a heat source included in the semiconductor dies than at other locations, or a structure of the thermal-mechanical bumps at the location near the heat source is different from a structure of the thermal-mechanical bumps at other locations.