公开(公告)号：US20230359566A1

公开(公告)日：2023-11-09

申请号：US18076671

申请日：2022-12-07

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： KYUNGHAN LEE ,  JAE-GON LEE ,  CHON YONG LEE

IPC分类号： G06F12/10

CPC分类号： G06F12/10 ,  G06F2212/205

摘要： A computing system includes a host, a memory, and a storage device. The memory includes a volatile memory and a memory controller. The storage device is connected with the host through a first interface and includes a nonvolatile memory and a storage controller, the storage device communicating with the host through a first port, communicating with the memory through a second port, and managing the memory. The memory is connected with the storage device through a second interface that is physically separated from the first interface. In an initialization operation, the storage controller sends map data that is stored in the nonvolatile memory to the memory through the second interface. In the initialization operation, the memory controller stores the map data in the volatile memory.

公开(公告)号：US20230359567A1

公开(公告)日：2023-11-09

申请号：US18136034

申请日：2023-04-18

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： KYUNGHAN LEE ,  JAE-GON LEE ,  Chon Yong LEE

IPC分类号： G06F12/1009

CPC分类号： G06F12/1009

摘要： A computing device includes a storage device and a memory. The storage device includes nonvolatile and internal buffer memories, and a storage controller that controls the nonvolatile and internal buffer memories and communicates with a bus. The memory includes a buffer memory and a memory controller that controls the buffer memory and communicates with the bus. The nonvolatile memory stores user data and map data. In an initialization operation, the storage controller sends the map data to the memory through the bus, and the memory controller stores the map data that is transferred from the storage device through the bus, in the buffer memory. After the initialization operation, the memory controller sends partial map data of the map data to the storage device through the bus, and the storage controller stores the partial map data that is transferred from the memory through the bus, in the internal buffer memory.

公开(公告)号：US20230359379A1

公开(公告)日：2023-11-09

申请号：US18140420

申请日：2023-04-27

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： CHON YONG LEE ,  KYUNGHAN LEE ,  SEONGSIK HWANG ,  JAE-GON LEE ,  KYUNG-CHANG RYOO

IPC分类号： G06F3/06

CPC分类号： G06F3/064 ,  G06F3/0656 ,  G06F3/0683

摘要： A method of operating a computing system which includes a plurality of storage devices, a memory device, and a switch, is provided. The method includes: providing a first mapping request including first metadata corresponding to first user data to the memory device through the switch, by a first storage device of the plurality of storage devices; identifying a first standard corresponding to the first metadata based on the first mapping request, by the memory device; and generating first map data indicating a relationship between a first physical block address and a first logical block address of the first user data based on the first standard, by the memory device.

公开(公告)号：US20230359389A1

公开(公告)日：2023-11-09

申请号：US18130650

申请日：2023-04-04

申请人： SAMSUNG ELECTRONICS CO., LTD

发明人： KYUNGHAN LEE ,  JAE-GON LEE ,  Chon Yong LEE

IPC分类号： G06F3/06

CPC分类号： G06F3/0655 ,  G06F3/0679 ,  G06F3/0604

摘要： A system includes a first compute express link (CXL) storage device, a second CXL storage device, a first CXL memory device, and a CXL switch connected to the first CXL storage device, the second CXL storage device and the first CXL memory device through a CXL interface, the CXL switch configured to arbitrate communications between the first CXL storage device and the second CXL storage device, and the first CXL memory device. The first CXL memory device is configured to store first map data of the first CXL storage device and second map data of the second CXL storage device, the first CXL storage device is configured to exchange at least a portion of the first map data with the first CXL memory device through the CXL switch, and the second CXL storage device is configured to exchange at least a portion of the second map data with the first CXL memory device through the CXL switch.

公开(公告)号：US20220137865A1

公开(公告)日：2022-05-05

申请号：US17509669

申请日：2021-10-25

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： CHON YONG LEE ,  JAE-GON LEE ,  KYUNGHAN LEE

IPC分类号： G06F3/06

摘要： A memory expander includes a memory device that stores a plurality of task data. A controller controls the memory device. The controller receives metadata and a management request from an external central processing unit (CPU) through a compute express link (CXL) interface and operates in a management mode in response to the management request. In the management mode, the controller receives a read request and a first address from an accelerator through the CXL interface and transmits one of the plurality of task data to the accelerator based on the metadata in response to the read request.