公开(公告)号：US20180294270A1

公开(公告)日：2018-10-11

申请号：US15815164

申请日：2017-11-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYUNG-HWAN LEE ,  MIN-KYUNG BAE ,  BYOUNG-TAEK KIM ,  HYE-JIN CHO ,  YONG-SEOK KIM ,  TAE-HUN KIM ,  JUN-HEE LIM

IPC: H01L27/1157 ,  H01L27/11582

Abstract: A vertical stack memory device includes a doped semiconductor substrate having a common source to which a source power is applied and a low band gap layer that is spaced apart from the common source, and the low band gap comprising low band gap materials. A stack gate structure has gate electrodes and insulation interlayer patterns that are alternately and vertically stacked on the substrate in a first direction. A channel structure penetrates through the stack gate structure in the first direction. The channel structure makes contact with the low hand gap layer. A charge storage structure is interposed between the stack gate structure and the channel structure. The charge storage structure is configured to selectively store charge and to provide the stored charge to a memory cell, the stack gate structure, and the channel structure.